SLUSDY3 December   2023 BQ25750

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Description (continued)
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics (BQ25750)
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Device Power-On-Reset
      2. 8.3.2 Device Power-Up From Battery Without Input Source
      3. 8.3.3 Device Power Up from Input Source
        1. 8.3.3.1 VAC Operating Window Programming (ACUV and ACOV)
        2. 8.3.3.2 REGN Regulator (REGN LDO)
        3. 8.3.3.3 Compensation-Free Buck-Boost Converter Operation
          1. 8.3.3.3.1 Light-Load Operation
        4. 8.3.3.4 Switching Frequency and Synchronization (FSW_SYNC)
        5. 8.3.3.5 Device HIZ Mode
      4. 8.3.4 Battery Charging Management
        1. 8.3.4.1 Autonomous Charging Cycle
          1. 8.3.4.1.1 Charge Current Programming (ICHG pin and ICHG_REG)
        2. 8.3.4.2 Li-Ion Battery Charging Profile
        3. 8.3.4.3 LiFePO4 Battery Charging Profile
        4. 8.3.4.4 Charging Termination for Li-ion and LiFePO4
        5. 8.3.4.5 Charging Safety Timer
        6. 8.3.4.6 Thermistor Qualification
          1. 8.3.4.6.1 JEITA Guideline Compliance in Charge Mode
          2. 8.3.4.6.2 Cold/Hot Temperature Window in Reverse Mode
      5. 8.3.5 Power Path Management
        1. 8.3.5.1 Dynamic Power Management: Input Voltage and Input Current Regulation
          1. 8.3.5.1.1 Input Current Regulation
            1. 8.3.5.1.1.1 ILIM_HIZ Pin
          2. 8.3.5.1.2 Input Voltage Regulation
            1. 8.3.5.1.2.1 Max Power Point Tracking (MPPT) for Solar PV Panel
      6. 8.3.6 Reverse Mode Power Direction
        1. 8.3.6.1 Auto Reverse Mode
      7. 8.3.7 Integrated 16-Bit ADC for Monitoring
      8. 8.3.8 Status Outputs (PG, STAT1, STAT2, and INT)
        1. 8.3.8.1 Power Good Indicator (PG)
        2. 8.3.8.2 Charging Status Indicator (STAT1, STAT2 Pins)
        3. 8.3.8.3 Interrupt to Host (INT)
      9. 8.3.9 Serial Interface
        1. 8.3.9.1 Data Validity
        2. 8.3.9.2 START and STOP Conditions
        3. 8.3.9.3 Byte Format
        4. 8.3.9.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 8.3.9.5 Target Address and Data Direction Bit
        6. 8.3.9.6 Single Write and Read
        7. 8.3.9.7 Multi-Write and Multi-Read
    4. 8.4 Device Functional Modes
      1. 8.4.1 Host Mode and Default Mode
      2. 8.4.2 Register Bit Reset
    5. 8.5 BQ25750 Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Typical Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1  ACUV / ACOV Input Voltage Operating Window Programming
          2. 9.2.1.2.2  Charge Voltage Selection
          3. 9.2.1.2.3  Switching Frequency Selection
          4. 9.2.1.2.4  Inductor Selection
          5. 9.2.1.2.5  Input (VAC / SYS) Capacitor
          6. 9.2.1.2.6  Output (VBAT) Capacitor
          7. 9.2.1.2.7  Sense Resistor (RAC_SNS and RBAT_SNS) and Current Programming
          8. 9.2.1.2.8  Power MOSFETs Selection
          9. 9.2.1.2.9  ACFETs and BATFETs Selection
          10. 9.2.1.2.10 Converter Fast Transient Response
        3. 9.2.1.3 Application Curves
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information
9.2.1.2.1 ACUV / ACOV Input Voltage Operating Window Programming

The input voltage operating window is programmed by an ACUV / ACOV window with a resistor divider from VAC to GND. The top resistor, RAC1 is typically selected as 1,000 kΩ to minimize the input voltage leakage current. Assuming the desired trip-points for under-voltage and over-voltage protection are labeled VVACUVP and VVACOVP, the resistor divider required can be calculated as follows. The internal reference for the over-voltage threshold (VREF_ACOV) is 1.2 V. The internal reference for the under-voltage threshold (VREF_ACUV) is 1.1 V.

GUID-20220308-SS0I-SLHG-FK5S-X8HN4PCM2QHV-low.svg Figure 9-2 ACUV and ACOV Resistor Divider
Equation 8. V V A C O V P = 1.2 V 1,000 k Ω + R A C 2 + R A C 3 R A C 3
Equation 9. V V A C U V P = 1.1 V 1,000 k Ω + R A C 2 + R A C 3 R A C 2 + R A C 3

Solving this system of equations and finding the nearest 0.1% resistor value for the desired trip-points as 40 V and 56 V for undervoltage and overvoltage yields:

RAC2 = 6.26 kΩ

RAC3 = 22.1 kΩ

The resulting overvoltage trip point can be calculated as:

VVACOVP = 1.2 V (1,000 kΩ + 6.26 kΩ + 22.1 kΩ) / (22.1 kΩ) = 55.8 V

Similarly, the VVACUVP can be calculated as: 39.9 V

Note that in addition to programming the input undervoltage threshold, the ACUV pin also programs a hardware input voltage regulation limit when the pin voltage reaches the reference (VACUV_DPM, typically 1.2 V). When the input voltage reaches this threshold, the charger will reduce charge current to regulate the ACUV pin to the 1.2 V reference. For the above example, the hardware ACUV_DPM level can be calculated as:

ACUV_DPM = 1.2 V (1,000 kΩ + 6.26 kΩ + 22.1 kΩ) / (6.26 kΩ + 22.1 kΩ) = 43.5 V

For the default device operating window of 4.2 V to 60 V, the ACUV can be pulled up directly to VAC, while the ACOV can be pulled directly to GND.