SLUSET4B December   2022  – March 2024 BQ25758

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Device Power-On-Reset
      2. 6.3.2 Device Power-Up From Battery Without Input Source
      3. 6.3.3 Device Power Up from Input Source
        1. 6.3.3.1 VAC Operating Window Programming (ACUV and ACOV)
        2. 6.3.3.2 MODE Pin Configuration
        3. 6.3.3.3 REGN Regulator (REGN LDO)
        4. 6.3.3.4 Compensation-Free Buck-Boost Converter Operation
          1. 6.3.3.4.1 Light-Load Operation
        5. 6.3.3.5 Switching Frequency and Synchronization (FSW_SYNC)
        6. 6.3.3.6 Device HIZ Mode
      4. 6.3.4 Power Management
        1. 6.3.4.1 Output Voltage Programming (VOUT_REG)
        2. 6.3.4.2 Output Current Programming (IOUT pin and IOUT_REG)
        3. 6.3.4.3 Dynamic Power Management: Input Voltage and Input Current Regulation
          1. 6.3.4.3.1 Input Current Regulation
            1. 6.3.4.3.1.1 IIN Pin
          2. 6.3.4.3.2 Input Voltage Regulation
        4. 6.3.4.4 Bypass Mode
      5. 6.3.5 Bidirectional Power Flow and Programmability
      6. 6.3.6 Integrated 16-Bit ADC for Monitoring
      7. 6.3.7 Status Outputs (PG, STAT and INT)
        1. 6.3.7.1 Power Good Indicator (PG)
        2. 6.3.7.2 Interrupt to Host (INT)
      8. 6.3.8 Protections
        1. 6.3.8.1 Voltage and Current Monitoring
          1. 6.3.8.1.1 VAC Over-voltage Protection (VAC_OVP)
          2. 6.3.8.1.2 VAC Under-voltage Protection (VAC_UVP)
          3. 6.3.8.1.3 Reverse Mode Over-voltage Protection (REV_OVP)
          4. 6.3.8.1.4 Reverse Mode Under-voltage Protection (REV_UVP)
          5. 6.3.8.1.5 DRV_SUP Under-voltage and Over-voltage Protection (DRV_OKZ)
          6. 6.3.8.1.6 REGN Under-voltage Protection (REGN_OKZ)
        2. 6.3.8.2 Thermal Shutdown (TSHUT)
      9. 6.3.9 Serial Interface
        1. 6.3.9.1 Data Validity
        2. 6.3.9.2 START and STOP Conditions
        3. 6.3.9.3 Byte Format
        4. 6.3.9.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 6.3.9.5 Target Address and Data Direction Bit
        6. 6.3.9.6 Single Write and Read
        7. 6.3.9.7 Multi-Write and Multi-Read
    4. 6.4 Device Functional Modes
      1. 6.4.1 Host Mode and Default Mode
      2. 6.4.2 Register Bit Reset
    5. 6.5 BQ25758 Registers
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Typical Application (Buck-Boost configuration)
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 ACUV / ACOV Input Voltage Operating Window Programming
          2. 7.2.1.2.2 Switching Frequency Selection
          3. 7.2.1.2.3 Inductor Selection
          4. 7.2.1.2.4 Input (VAC) Capacitor
          5. 7.2.1.2.5 Output (VBAT) Capacitor
          6. 7.2.1.2.6 Sense Resistor (RAC_SNS and RBAT_SNS) and Current Programming
          7. 7.2.1.2.7 Converter Fast Transient Response
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Typical Application (Buck-only configuration)
        1. 7.2.2.1 Design Requirements
  9. Power Supply Recommendations
  10. Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RRV|36
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Layout Example

Based on the above layout guidelines, the buck-boost PCB layout example top view is shown below including all the key power components.

GUID-20221107-SS0I-0D3P-TSSM-SXXZ7F7WZPKF-low.png Figure 9-1 PCB Layout Reference Example Top View

For both input and output current sensing resistors, differential sensing and routing method are suggested and highlighted in figure below. Use wide trace for gate drive traces, minimum 20-mil trace width. Connect all analog grounds to a dedicated low-impedance copper plane, which is tied to the power ground underneath the IC exposed pad.

GUID-20221107-SS0I-QWG3-CXLS-QBXPN8PLSVG0-low.png Figure 9-2 PCB Layout Gate Drive and Current Sensing Signal Layer Routing