The device includes a 16-bit ADC to monitor critical system information based on the device’s modes of operation. The control of the ADC is done through the ADCOption register. There are total 7 ADC channels can be enabled independently through ADCOption registers [7:0] bits. The ADC_RATE bit is used to select between continuous conversion and one-shot conversion. When continuous conversion is chosen, each enabled ADC channel will be executed one by one and continuously, the ADC cycling refresh time can be calculated by the product of enabled ADC channel count(ADCOption registers [7:0] setting) and the ADC_SAMPLE configuration (24ms/12ms/6ms). When one-shot conversion is selected, ADC_EN is used to start one-shot conversion, after a 1-shot conversion finishes, the ADC_EN bit is cleared, and must be re-asserted to start a new conversion. When ADC is under continuous mode, then ADC_EN is used to enable continuous ADC operation. To enable each channel ADC not only ADC_EN should be configured at 1b, but also need to enable the dedicated channels in ADCOption registers [7:0] bits. The device will immediately reset ADC_EN to 0b when all ADC channels are disabled.

The ADC is allowed to operate if either the VBUS>V_{VBUS_CONVEN} or VBAT>V_{VBAT_UVLOZ} is valid. If no adapter is present (VBUS<V_{VBUS_CONVENZ}), and the VBAT is less than V_{VBAT_UVLO}, the device will not perform an ADC measurement, nor update the ADC read-back values. Additionally, the device will immediately reset ADC_EN to 0b. If the charger changes mode (for example, if adapter is connected) while an ADC conversion is running, the conversion is interrupted. Once the mode change is complete, the ADC resumes conversion, starting with the channel where it was interrupted.

The ADC_SAMPLE bits control the resolution of the ADC, and also determine conversion time of t_{ADC_CONV} based on resolution. The total conversion time of one cycle ADC of all channels enabled can be estimated using channel counts multiplied by the corresponding t_{ADC_CONV} determined by ADC_SAMPLE setting. If an ADC channel is disabled by setting the corresponding bit, then the read-back value in the corresponding register will be from the last valid ADC conversion or the default POR value (all zeros if no conversions have taken place). If an ADC parameter is disabled in the middle of an ADC measurement cycle, the device will finish the conversion of that parameter, but will not convert the parameter starting the next conversion cycle. Even though no conversion takes place when all ADC measurement parameters are disabled, the ADC circuitry is active and ready to begin conversion as soon as one of the bits in ADCOption register[7:0] is set to ‘1’.

ADC conversion operates independently of the faults present in the device. ADC conversion will continue even after a fault has occurred (such as one that causes the power stage to be disabled), and the host must set ADC_EN to ‘0b’ in order to disable the ADC. ADC conversion is interrupted upon adapter plug-in, and will only resume after REGN regulator is enabled from the input. ADC readings are only valid for DC states and not for transients. When host disables ADC by setting ADC_EN to 0b, the ADC stops immediately, and ADC measurement values correspond to last valid ADC reading.

If the host wants to exit continuous ADC more gracefully, it is possible to do either of the following:

1. Write ADC_RATE to one-shot, and the ADC will stop at the end of a complete cycle of conversions, or
2. Disable all ADC conversion channels, and the ADC will stop at the end of the current measurement.

When system load is powered from the battery (input source is removed, or device in HIZ mode), enabling the ADC automatically powers up REGN and increases the quiescent current. To keep the battery leakage low, it is recommended to duty cycle or completely disable the ADC.