SLUSEK7 September 2024 BQ25773
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
While operating in reverse direction, the device monitors the VBUS voltage. When VBUS exceeds VVBUS_OTG_OV there is 20-mA discharge current flow through VBUS pin. After VBUS exceeds VVBUS_OTG_OV for 10-ms deglitch time, the device stops switching, and and clear EN_OTG bit to 0b and exit OTG mode. When the event is triggered, the FAULT_OTG_OVP read only bit is triggered and CHRG_OK pin is pulled low if OTG_ON_CHRGOK=1b. The FAULT_OTG_OVP bit can be cleared through EC host read. In order to re-start OTG mode, EC host has to re-enable OTG mode by setting EN_OTG bit to 1b.