CELL_BATPRES pin is biased with a resistor divider from REGN_A/B to GND. After REGN_A/B ramps up or CELL_BATPRES pin ramps up, the device detects the battery configuration through CELL_BATPRES pin bias voltage after 2ms delay time. No external cap is allowed at CELL_BATPRES pin. When CELL_BATPRES pin is pulled down to GND at the beginning of device start up process, CHARGE_VOLTAGE(), SYSOVP, VSYS_MIN() and VRECHG() follow battery removal row in the table below.

After device start up when battery is removed, CELL_BATPRES pin should be pulled low through external MOSFET shown in application diagram. If CELL_BATPRES pin is pulled lower than V_{CELL_BATPRES_FALL} for 1ms deglitch time, then device disables charge by resetting CHARGE_CURRENT()=000h and EN_AUTO_CHG=0b; at same time, CHARGE_VOLTAGE(), SYSOVP, VSYS_MIN() and VRECHG() are not changed. When REGN_A/B voltage rises up or CELL_BATPRES pin is increased higher than V_{CELL_BATPRES_RISE}, the device should re-read cell configuration again with 2ms delay time: CHARGE_VOLTAGE(), SYSOVP, VSYS_MIN() and VRECHG() should be re-detected to corresponding cell setting default value if they are not changed by EC before; if any of CHARGE_VOLTAGE(), SYSOVP, VSYS_MIN() and VRECHG() are changed by EC before this re-detection then their value should not be influenced by the new detection process anymore. This is needed to avoid EC writing target value back and forth. Refer to Table 7-6 for CELL_BATPRES pin configuration typical voltage for swept cell count. Note if device is in learn mode (EN_LEARN=1b). Pulling CELL_BATPRES pin low clears EN_LEARN bit to 0b and forces device to exit learn mode.

When CELL_BATPRES pin is pulled to ground, battery removal is indicated. Since there is no battery supplement, the charger can automatically disable IIN_DPM by setting EN_IIN_DPM to 0 to minimize VSYS voltage drop. This function can be enabled through setting IIN_DPM_AUTO_DISABLE=1b. The host can re-enable IIN_DPM function later by writing EN_IIN_DPM bit to 1.