SLVSE40C February 2018 – September 2019 BQ25882
PRODUCTION DATA.
REG20 is shown in Figure 69 and described in Table 41.
Return to Summary Table.
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Field | VSYS_ADC[7:0] |
Bit | Field | Type | Reset by REG_RST | Reset by WATCHDOG | Description | |
---|---|---|---|---|---|---|
7 | VSYS_ADC[7] | R | Yes | No | 128 mV | VSYS Voltage reading:
Range: 0 V – 10 V |
6 | VSYS_ADC[6] | R | Yes | No | 64 mV | |
5 | VSYS_ADC[5] | R | Yes | No | 32 mV | |
4 | VSYS_ADC[4] | R | Yes | No | 16 mV | |
3 | VSYS_ADC[3] | R | Yes | No | 8 mV | |
2 | VSYS_ADC[2] | R | Yes | No | 4 mV | |
1 | VSYS_ADC[1] | R | Yes | No | 2 mV | |
0 | VSYS_ADC[0] | R | Yes | No | 1 mV |