SLUSCC5A September   2016  – May 2018 BQ25890H

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Simplified Schematic
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Functional Block Diagram
    2. 8.2 Feature Description
      1. 8.2.1  Device Power-On-Reset (POR)
      2. 8.2.2  Device Power Up from Battery without Input Source
      3. 8.2.3  Device Power Up from Input Source
        1. 8.2.3.1 Power Up REGN Regulation (LDO)
        2. 8.2.3.2 Poor Source Qualification
        3. 8.2.3.3 Input Source Type Detection
          1. 8.2.3.3.1 D+/D– Detection Sets Input Current Limit
          2. 8.2.3.3.2 Force Input Current Limit Detection
        4. 8.2.3.4 Input Voltage Limit Threshold Setting (VINDPM Threshold)
        5. 8.2.3.5 Converter Power-Up
      4. 8.2.4  Input Current Optimizer (ICO)
      5. 8.2.5  Boost Mode Operation from Battery
      6. 8.2.6  Power Path Management
        1. 8.2.6.1 Narrow VDC Architecture
        2. 8.2.6.2 Dynamic Power Management
        3. 8.2.6.3 Supplement Mode
      7. 8.2.7  Battery Charging Management
        1. 8.2.7.1 Autonomous Charging Cycle
        2. 8.2.7.2 Battery Charging Profile
        3. 8.2.7.3 Charging Termination
        4. 8.2.7.4 Resistance Compensation (IRCOMP)
        5. 8.2.7.5 Thermistor Qualification
          1. 8.2.7.5.1 JEITA Guideline Compliance in Charge Mode
          2. 8.2.7.5.2 Cold/Hot Temperature Window in Boost Mode
        6. 8.2.7.6 Charging Safety Timer
      8. 8.2.8  Battery Monitor
      9. 8.2.9  Status/Control Outputs (STAT, INT and DSEL)
        1. 8.2.9.1 Charging Status Indicator (STAT)
        2. 8.2.9.2 Interrupt to Host (INT)
        3. 8.2.9.3 D+/D- Multiplexer Selection Control
      10. 8.2.10 BATET (Q4) Control
        1. 8.2.10.1 BATFET Disable Mode (Shipping Mode)
        2. 8.2.10.2 BATFET Enable (Exit Shipping Mode)
        3. 8.2.10.3 BATFET Full System Reset
      11. 8.2.11 Current Pulse Control Protocol
      12. 8.2.12 D+/D- Output Driver
      13. 8.2.13 Input Current Limit on ILIM
      14. 8.2.14 Thermal Regulation and Thermal Shutdown
        1. 8.2.14.1 Thermal Protection in Buck Mode
        2. 8.2.14.2 Thermal Protection in Boost Mode
      15. 8.2.15 Voltage and Current Monitoring in Buck and Boost Mode
        1. 8.2.15.1 Voltage and Current Monitoring in Buck Mode
          1. 8.2.15.1.1 Input Overvoltage (ACOV)
          2. 8.2.15.1.2 System Overvoltage Protection (SYSOVP)
        2. 8.2.15.2 Voltage and Current Monitoring in Boost Mode
          1. 8.2.15.2.1 VBUS Overcurrent Protection
          2. 8.2.15.2.2 Boost Mode Overvoltage Protection
      16. 8.2.16 Battery Protection
        1. 8.2.16.1 Battery Overvoltage Protection (BATOVP)
        2. 8.2.16.2 Battery Over-Discharge Protection
        3. 8.2.16.3 System Overcurrent Protection
      17. 8.2.17 Serial Interface
        1. 8.2.17.1 Data Validity
        2. 8.2.17.2 START and STOP Conditions
        3. 8.2.17.3 Byte Format
        4. 8.2.17.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 8.2.17.5 Slave Address and Data Direction Bit
        6. 8.2.17.6 Single Read and Write
        7. 8.2.17.7 Multi-Read and Multi-Write
    3. 8.3 Device Functional Modes
      1. 8.3.1 Host Mode and Default Mode
    4. 8.4 Register Maps
      1. 8.4.1  REG00
        1. Table 8. REG00
      2. 8.4.2  REG01
        1. Table 9. REG01
      3. 8.4.3  REG02
        1. Table 10. REG02
      4. 8.4.4  REG03
        1. Table 11. REG03
      5. 8.4.5  REG04
        1. Table 12. REG04
      6. 8.4.6  REG05
        1. Table 13. REG05
      7. 8.4.7  REG06
        1. Table 14. REG06
      8. 8.4.8  REG07
        1. Table 15. REG07
      9. 8.4.9  REG08
        1. Table 16. REG08
      10. 8.4.10 REG09
        1. Table 17. REG09
      11. 8.4.11 REG0A
        1. Table 18. REG0A
      12. 8.4.12 REG0B
        1. Table 19. REG0B
      13. 8.4.13 REG0C
        1. Table 20. REG0C
      14. 8.4.14 REG0D
        1. Table 21. REG0D
      15. 8.4.15 REG0E
        1. Table 22. REG0E
      16. 8.4.16 REG0F
        1. Table 23. REG0F
      17. 8.4.17 REG10
        1. Table 24. REG10
      18. 8.4.18 REG11
        1. Table 25. REG11
      19. 8.4.19 REG12
        1. Table 26. REG12
      20. 8.4.20 REG13
        1. Table 27. REG13
      21. 8.4.21 REG14
        1. Table 28. REG14
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Buck Input Capacitor
        3. 9.2.2.3 System Output Capacitor
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Description (continued)

The I2C Serial interface with charging and system settings makes the device a truly flexible solution.

The bq25890H is a highly-integrated 5-A switch-mode battery charge management and system power path management device for single cell Li-Ion and Li-polymer battery. It features fast charging with high input voltage support for a wide range of smartphone, tablet and portable devices. Its low impedance power path optimizes switch-mode operation efficiency, reduces battery charging time and extends battery life during discharging phase. It also integrates Input Current Optimizer (ICO) and Resistance Compensation (IRCOMP) to deliver maximum charging power to battery. The solution is highly integrated with input reverse-blocking FET (RBFET, Q1), high-side switching FET (HSFET, Q2), low-side switching FET (LSFET, Q3), and battery FET (BATFET, Q4) between system and battery. It also integrates the bootstrap diode for the high-side gate drive and battery monitor for simplified system design. The I2C serial interface with charging and system settings makes the device a truly flexible solution.

The device supports a wide range of input sources, including standard USB host port, USB charging port, and USB compliant adjustable high voltage adapter. To support fast charging using adjustable high voltage adapter, the SN25890H provides support for MaxChargeTM handshake using D+/D- pins and DSEL pin for USB switch control. In addition, the device include interface to support adjustable high voltage adapter using input current pulse protocol. To set the default input current limit, device uses the built-in USB interface, such as USB PHY device. The device is compliant with USB 2.0 and USB 3.0 power spec with input current and voltage regulation. In addition, the Input Current Optimizer (ICO) supports the detection of maximum power point detection of the input source without overload. The device also meets USB On-the-Go (OTG) operation power rating specification by supplying 5 V (Adjustable 4.5 V - 5.5 V) on VBUS with current limit up to 2.4 A.

The power path management regulates the system slightly above battery voltage but does not drop below 3.5V minimum system voltage (programmable). With this feature, the system maintains operation even when the battery is completely depleted or removed. When the input current limit or voltage limit is reached, the power path management automatically reduces the charge current to zero. As the system load continues to increase, the power path discharges the battery until the system power requirement is met. This Supplemental Mode operation prevents overloading the input source.

The device initiates and completes a charging cycle without software control. It automatically detects the battery voltage and charges the battery in three phases: pre-conditioning, constant current and constant voltage. At the end of the charging cycle, the charger automatically terminates when the charge current is below a preset limit in the constant voltage phase. When the full battery falls below the recharge threshold, the charger will automatically start another charging cycle.

The charger provides various safety features for battery charging and system operations, including battery temperature negative thermistor monitoring, charging safety timer and overvoltage/overcurrent protections. The thermal regulation reduces charge current when the junction temperature exceeds 120°C (programmable). The STAT output reports the charging status and any fault conditions. The INT immediately notifies host when fault occurs.

The device also provides a 7-bit analog-to-digital converter (ADC) for monitoring charge current and input/battery/system (VBUS, BAT, SYS, TS) voltages. The QON pin provides BATFET enable/reset control to exit low power ship mode or full system reset function.

The device family is available in 24-pin, 4 x 4 mm2 x 0.75 mm thin WQFN package.