bq27220 Single-Cell CEDV Fuel Gauge
- SLUSCB7A March 2016 – April 2016
  
  PRODUCTION DATA.

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DATA SHEET

bq27220 Single-Cell CEDV Fuel Gauge

1 Features

Single-Cell Li-Ion Battery Fuel Gauge
- Resides in Pack or on System Board
- Supports Embedded or Removable Batteries
- Powers Directly from Battery with Integrated LDO
- Supports a Low-Value (10-mΩ) External Sense Resistor
Ultra-Low Power Consumption in NORMAL (50 µA) and SLEEP (9 µA) Modes
Battery Fuel Gauging Based on Compensated End-of-Discharge Voltage (CEDV) Technology
- Reports Remaining Capacity and State-of-Charge (SOC) with Smoothing Filter
- Adjusts Automatically for Battery Aging, Self-Discharge, Temperature, and Rate Changes
- Provides Battery State-of-Health (Aging) Estimation
Microcontroller Peripheral Supports:
- 400-kHz I2C™ Serial Interface
- Configurable SOC Interrupt OR
  Battery Low Digital Output Warning
- Internal Temperature Sensor OR
  Host-Reported Temperature OR
  External Thermistor

2 Applications

Smartphones and Feature Phones
Tablets
Wearables
Building Automation
Portable Medical/Industrial Handsets
Portable Audio
Gaming

3 Description

The Texas Instruments bq27220 battery fuel gauge is a single-cell gauge that requires minimal user-configuration and system microcontroller firmware development, leading to quick system bring-up. The bq27220 device uses the Compensated End-of-Discharge Voltage (CEDV) algorithm for fuel gauging, and provides information such as remaining battery capacity (mAh), state-of-charge (%), runtime-to-empty (min), battery voltage (mV), temperature (°C), and state-of-health (%).

The bq27220 battery fuel gauge has ultra-low power consumption in NORMAL (50 μA) and SLEEP (9 μA) modes, leading to longer battery runtime. Configurable interrupts help save system power and free up the host from continuous polling. Accurate temperature sensing is supported via an external thermistor.

Customers can use preloaded CEDV parameters in ROM or can generate custom chemistry parameters using TI's web-based tool, GAUGEPARCAL. Custom-generated parameters can be either programmed in the device RAM by the host on power up of the system or customers can program the parameters to an onboard One-Time Programmable (OTP) memory.

Battery fuel gauging with the bq27220 device requires connections only to PACK+ (P+) and PACK– (P–) for a removable battery pack or embedded battery circuit. The tiny, 9-ball, 1.62 mm × 1.58 mm, 0.5-mm pitch NanoFree™ chip scale package (DSBGA) is ideal for space-constrained applications.

Device Information⁽¹⁾

PART NUMBER	PACKAGE	BODY SIZE (NOM)
bq27220	YZF (9)	1.62 mm × 1.58 mm

For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Schematic (System-Side)

4 Revision History

DATE	REVISION	NOTES
April 2016	A	PRODUCT PREVIEW to Production Data

5 Pin Configuration and Functions

Top View

Bottom View

Pin Functions

PIN		TYPE	DESCRIPTION
NAME	NUMBER	TYPE	DESCRIPTION
BAT	C3	PI, AI⁽¹⁾	LDO regulator input and battery voltage measurement input. Kelvin sense connect to the positive battery terminal (PACKP). Connect a capacitor (1 µF) between BAT and V_SS. Place the capacitor close to the gauge.
BIN	B1	DI	Battery insertion detection input. If OpConfig [BI_PU_EN] = 1 (default), a logic low on the pin is detected as battery insertion. For a removable pack, the BIN pin can be connected to V_SS through a pulldown resistor on the pack, typically the 10-kΩ thermistor; the system board should use a 1.8-MΩ pullup resistor to V_DD to ensure the BIN pin is high when a battery is removed. If the battery is embedded in the system or in the pack, it is recommended to leave [BI_PU_EN] = 1 and use a 10-kΩ pulldown resistor from BIN to V_SS. If [BI_PU_EN] = 0, then the host must inform the gauge of battery insertion and removal with the BAT_INSERT and BAT_REMOVE subcommands. A 10-kΩ pulldown resistor should be placed between BIN and V_SS, even if this pin is unused. NOTE: The BIN pin must not be shorted directly to V_CC or V_SS and any pullup resistor on the BIN pin must be connected only to V_DD and not an external voltage rail. If an external thermistor is used for temperature input, the thermistor should be connected between this pin and V_SS.
GPOUT	A1	DO	This open-drain output can be configured to indicate BAT_LOW when the OpConfig [BATLOWEN] bit is set. By default [BATLOWEN] is cleared and this pin performs an interrupt function (SOC_INT) by pulsing for specific events, such as a change in state-of-charge. Signal polarity for these functions is controlled by the [GPIOPOL] configuration bit. This pin should not be left floating, even if unused; therefore, a 10-kΩ pullup resistor is recommended. If the device is in SHUTDOWN mode, toggling GPOUT makes the gauge exit SHUTDOWN. It is recommended to connect GPOUT to a GPIO of the host MCU so that in case of any inadvertent shutdown condition, the gauge can be commanded to come out of SHUTDOWN.
SCL	A3	DIO	Slave I²C serial bus for communication with system (Master). Open-drain pins. Use with external 10-kΩ pullup resistors (typical) for each pin. If the external pullup resistors will be disconnected from these pins during normal operation, recommend using external 1-MΩ pulldown resistors to V_SS at each pin to avoid floating inputs.
SDA	A2	DIO
SRN	C2	AI	Coulomb counter differential inputs expecting an external 10-mΩ, 1% sense resistor. For system-side configurations, Kelvin sense connect SRP to the positive battery terminal (PACKP) side of the external sense resistor. Kelvin sense connect SRN to the other side of the external sense resistor with the positive connection to the system (VSYS). For pack-side configurations with low-side sensing, connect SRP to PACK– and SRN to Cell–. See the Simplified Schematic. No calibration is required. The fuel gauge is pre-calibrated for a standard 10-mΩ, 1% sense resistor.
SRP	C1	AI
V_DD	B3	PO	1.8-V regulator output. Decouple with a 2.2-μF ceramic capacitor to V_SS. This pin is not intended to provide power for other devices in the system.
V_SS	B2	PI	Ground pin

(1) IO = Digital input-output, AI = Analog input, P = Power connection

6 Specifications

6.1 Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted)⁽¹⁾

		MIN	MAX	UNIT
V_BAT	BAT pin input voltage range	–0.3	6	V
V_SR	SRP and SRN pins input voltage range	–0.3	V_BAT + 0.3	V
V_SR	Differential voltage across SRP and SRN. ABS(SRP – SRN)		2	V
V_DD	V_DD pin supply voltage range (LDO output)	–0.3	2	V
V_IOD	Open-drain IO pins (SDA, SCL)	–0.3	6	V
V_IOPP	Push-pull IO pins (BIN)	–0.3	V_DD + 0.3	V
T_A	Operating free-air temperature range	–40	85	°C
Storage temperature, T_stg		–65	150	°C

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±1500	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±250	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

T_A = 30°C and V_BAT = 3.6 V (unless otherwise noted)

			MIN	NOM	MAX	UNIT
C_BAT⁽¹⁾	External input capacitor for internal LDO between BAT and V_SS	Nominal capacitor values specified. Recommend a 5% ceramic X5R-type capacitor located close to the device.		0.1		μF
C_LDO18⁽¹⁾	External output capacitor for internal LDO between V_DD and V_SS			2.2		μF
V_PU⁽¹⁾	External pullup voltage for open-drain pins (SDA, SCL, GPOUT)		1.62		3.6	V

(1) Specified by design. Not production tested.

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		bq27220	UNIT
		YZF (DSBGA)
		9 PINS
R_θJA	Junction-to-ambient thermal resistance	64.1	°C/W
R_θJCtop	Junction-to-case (top) thermal resistance	59.8	°C/W
R_θJB	Junction-to-board thermal resistance	52.7	°C/W
ψ_JT	Junction-to-top characterization parameter	0.3	°C/W
ψ_JB	Junction-to-board characterization parameter	28.3	°C/W
R_θJCbot	Junction-to-case (bottom) thermal resistance	2.4	°C/W

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953

6.5 Supply Current

T_A = 30°C and V_BAT = 3.6 V (unless otherwise noted)

PARAMETER		TEST CONDITIONS	TYP	UNIT
I_CC⁽¹⁾	NORMAL mode current	I_LOAD > Sleep Current⁽²⁾	50	μA
I_SLP⁽¹⁾	SLEEP mode current	I_LOAD < Sleep Current⁽²⁾	9	μA
I_SD⁽¹⁾	SHUTDOWN mode current	Fuel gauge in host commanded SHUTDOWN mode. (LDO regulator output disabled)	0.6	μA

(1) Specified by design. Not production tested.

(2) Wake Comparator Disabled.

6.6 Digital Input and Output DC Characteristics

T_A = –40°C to 85°C, typical values at T_A = 30°C and V_BAT = 3.6 V (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	MAX	UNIT
V_IH(OD)	Input voltage, high⁽²⁾	External pullup resistor to V_PU	V_PU × 0.7		V
V_IH(PP)	Input voltage, high ⁽³⁾		1.4		V
V_IL	Input voltage, low⁽²⁾ ⁽³⁾			0.6	V
V_OL	Output voltage, low⁽²⁾			0.6	V
I_OH	Output source current, high⁽²⁾			0.5	mA
I_OL(OD)	Output sink current, low⁽²⁾			–3	mA
C_IN⁽¹⁾	Input capacitance⁽²⁾⁽³⁾			5	pF
I_lkg	Input leakage current (SCL, SDA, BIN, GPOUT)			1	μA

(1) Specified by design. Not production tested.

(2) Open Drain pins: (SCL, SDA, GPOUT)

(3) Push-Pull pin: (BIN)

6.7 LDO Regulator, Wake-up, and Auto-Shutdown DC Characteristics

T_A = –40°C to 85°C, typical values at T_A = 30°C and V_BAT = 3.6 V (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
V_BAT	BAT pin regulator input		2.45		4.5	V
V_DD	Regulator output voltage			1.85		V
UVLO_IT+	V_BAT undervoltage lock-out LDO wake-up rising threshold			2		V
UVLO_IT–	V_BAT undervoltage lock-out LDO auto-shutdown falling threshold			1.95		V
V_WU+⁽¹⁾	GPOUT (input) LDO Wake-up rising edge threshold⁽²⁾	LDO Wake-up from SHUTDOWN mode	1.2			V

(1) Specified by design. Not production tested.

(2) If the device is commanded to SHUTDOWN via I²C with V_BAT > UVLO_IT+, a wake-up rising edge trigger is required on GPOUT.

6.8 LDO Regulator, Wake-up, and Auto-shutdown AC Characteristics

T_A = –40°C to 85°C, typical values at T_A = 30°C and V_BAT = 3.6 V (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
t_SHDN⁽¹⁾	SHUTDOWN entry time	Time delay from SHUTDOWN command to LDO output disable.			250	ms
t_SHUP⁽¹⁾	SHUTDOWN GPOUT low time	Minimum low time of GPOUT (input) in SHUTDOWN before WAKEUP	10			μs
t_VDD⁽¹⁾	Initial V_DD output delay			13		ms
t_WUVDD⁽¹⁾	Wake-up V_DD output delay	Time delay from rising edge of GPOUT (input) to nominal V_DD output.		8		ms
t_PUCD	Power-up communication delay	Time delay from rising edge of BAT to the Active state. Includes firmware initialization time.		250		ms

(1) Specified by design. Not production tested.

6.9 ADC (Temperature and Cell Measurement) Characteristics

T_A = –40°C to 85°C; typical values at T_A = 30°C and V_BAT = 3.6 V (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
V_IN(BAT)	BAT pin voltage measurement range	Voltage divider enabled	2.45		4.5	V
t_{ADC_CONV}	Conversion time			125		ms
	Effective resolution			15		bits

(1) Specified by design. Not tested in production.

6.10 Integrating ADC (Coulomb Counter) Characteristics

T_A = –40°C to 85°C; typical values at T_A = 30°C and V_BAT = 3.6 V (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
V_SRCM	Input voltage range of SRN, SRP pins		VSS		V_BAT	V
V_SRDM	Input differential voltage range of VSRP–VSRN			± 80		mV
t_{SR_CONV}	Conversion time	Single conversion		1		s
	Effective Resolution	Single conversion		16		bits

(1) Specified by design. Not tested in production.

6.11 I²C-Compatible Interface Communication Timing Characteristics

T_A = –40°C to 85°C; typical values at T_A = 30°C and V_BAT = 3.6 V (unless otherwise noted)

			MIN	MAX	UNIT
Standard Mode (100 kHz)
t_d(STA)	Start to first falling edge of SCL		4		μs
t_w(L)	SCL pulse duration (low)		4.7		μs
t_w(H)	SCL pulse duration (high)		4		μs
t_su(STA)	Setup for repeated start		4.7		μs
t_su(DAT)	Data setup time	Host drives SDA	250		ns
t_h(DAT)	Data hold time	Host drives SDA	0		ns
t_su(STOP)	Setup time for stop		4		μs
t_(BUF)	Bus free time between stop and start	Includes Command Waiting Time	66		μs
t_f	SCL or SDA fall time⁽¹⁾			300	ns
t_r	SCL or SDA rise time⁽¹⁾			300	ns
f_SCL	Clock frequency⁽²⁾			100	kHz
Fast Mode (400 kHz)
t_d(STA)	Start to first falling edge of SCL		600		ns
t_w(L)	SCL pulse duration (low)		1300		ns
t_w(H)	SCL pulse duration (high)		600		ns
t_su(STA)	Setup for repeated start		600		ns
t_su(DAT)	Data setup time	Host drives SDA	100		ns
t_h(DAT)	Data hold time	Host drives SDA	0		ns
t_su(STOP)	Setup time for stop		600		ns
t_(BUF)	Bus free time between stop and start	Includes Command Waiting Time	66		μs
t_f	SCL or SDA fall time⁽¹⁾			300	ns
t_r	SCL or SDA rise time⁽¹⁾			300	ns
f_SCL	Clock frequency⁽²⁾			400	kHz

(1) Specified by design. Not production tested.

(2) If the clock frequency (f_SCL) is > 100 kHz, use 1-byte write commands for proper operation. All other transactions types are supported at 400 kHz. (See I2C Interface and I2C Command Waiting Time.)

Figure 1. I²C-Compatible Interface Timing Diagram

6.12 SHUTDOWN and WAKE-UP Timing

Figure 2. SHUTDOWN and WAKE-UP Timing Diagram

6.13 Typical Characteristics

Figure 3. Current Accuracy Error vs. Temperature

Figure 5. Internal Temperature Accuracy Error vs. Temperature

Figure 4. Voltage Accuracy Error vs. Temperature