SLUSB23B October 2012 – June 2015
PRODUCTION DATA.
PIN | I/O(1) | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
BAT | E2 | I | Cell-voltage measurement input. ADC input. Recommend 4.8 V maximum for conversion accuracy. |
BIN | C3 | I | Battery-insertion detection input. A logic high-to-low transition is detected as a battery insertion event. Recommend using a pullup resistor >1 MΩ (1.8 MΩ, typical) to VCC for reduced power consumption. An internal pullup resistor option is also available using the Operation Configuration [BI_PU_EN] register bit. |
CE | D2 | I | Chip Enable. Internal LDO is disconnected from REGIN when driven low. |
GPOUT | A2 | O | General Purpose open-drain output. May be configured as a Battery Low indicator or perform SOC interrupt (SOC_INT) function. |
NC | A1, B2 | NA | No internal connection. May be left floating. |
C2, D3, E3 | IO | Reserved for factory use. Must be left floating for proper operation. | |
REGIN | E1 | P | Regulator input. Decouple with 0.1-μF ceramic capacitor to VSS. |
SCL | A3 | I | Slave I2C serial communications clock input line for communication with system (Master). Use with 10-kΩ pullup resistor (typical). |
SDA | B3 | I/O | Slave I2C serial communications data line for communication with system (Master). Open-drain IO. Use with 10-kΩ pullup resistor (typical). |
SRX | B1 | IA | Integrated Sense Resistor and Coulomb Counter input typically connected to battery PACK– terminal. For best performance decouple with 0.1-μF ceramic capacitor to VSS. |
VCC | D1 | P | Regulator output and bq27425 processor power. Decouple with 1-μF ceramic capacitor to VSS. |
VSS | C1 | P, IA | Device ground and Integrated Sense Resistor termination. |