SLUSB23B October   2012  – June 2015

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: Power-On Reset
    6. 7.6  2.5-V LDO Regulator
    7. 7.7  Integrating ADC (Coulomb Counter) Characteristics
    8. 7.8  Integrated Sense Resistor Characteristics
    9. 7.9  ADC (Temperature and Cell Measurement) Characteristics
    10. 7.10 EEPROM Memory Characteristics
    11. 7.11 Timing Requirements: I2C-Compatible Interface Communication
    12. 7.12 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Fuel Gauging
      2. 8.3.2 Fuel Gauging Configurations
        1. 8.3.2.1 SOC Smoothing Feature
      3. 8.3.3 GPOUT Pin
      4. 8.3.4 Battery Detection (BIN)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operating Modes
        1. 8.4.1.1 POR and INITIALIZATION Modes
        2. 8.4.1.2 CONFIG UPDATE Mode
        3. 8.4.1.3 NORMAL Mode
        4. 8.4.1.4 SLEEP Mode
        5. 8.4.1.5 HIBERNATE Mode
    5. 8.5 Programming
      1. 8.5.1 Standard Data Commands
        1. 8.5.1.1  Control(): 0x00 and 0x01
          1. 8.5.1.1.1  CONTROL_STATUS: 0x0000
          2. 8.5.1.1.2  DEVICE_TYPE: 0x0001
          3. 8.5.1.1.3  FW_VERSION: 0x0002
          4. 8.5.1.1.4  PREV_MACWRITE: 0x0007
          5. 8.5.1.1.5  CHEM_ID: 0x0008
          6. 8.5.1.1.6  BAT_INSERT: 0X000C
          7. 8.5.1.1.7  BAT_REMOVE: 0X000D
          8. 8.5.1.1.8  SET_HIBERNATE: 0x0011
          9. 8.5.1.1.9  CLEAR_HIBERNATE: 0x0012
          10. 8.5.1.1.10 SET_CFGUPDATE: 0x0013
          11. 8.5.1.1.11 SEALED: 0x0020
          12. 8.5.1.1.12 RESET: 0x0041
          13. 8.5.1.1.13 SOFT_RESET: 0x0042
        2. 8.5.1.2  Temperature( ): 0x02 and 0x03
        3. 8.5.1.3  Voltage( ): 0x04 and 0x05
        4. 8.5.1.4  Flags( ): 0x06 and 0x07
        5. 8.5.1.5  NominalAvailableCapacity( ): 0x08 and 0x09
        6. 8.5.1.6  FullAvailableCapacity( ): 0x0A and 0x0B
        7. 8.5.1.7  RemainingCapacity( ): 0x0C and 0x0D
        8. 8.5.1.8  FullChargeCapacity( ): 0x0E and 0x0F
        9. 8.5.1.9  AverageCurrent( ): 0x10 and 0x11
        10. 8.5.1.10 AveragePower( ): 0x18 and 0x19
        11. 8.5.1.11 StateOfCharge( ): 0x1C and 0x1D
        12. 8.5.1.12 IntTemperature( ): 0x1E and 0x1F
        13. 8.5.1.13 StateOfHealth( ): 0x20 and 0x21
        14. 8.5.1.14 OperationConfiguration( ): 0x3A and 0x3B
        15. 8.5.1.15 DesignCapacity( ): 0x3C and 0x3D
        16. 8.5.1.16 DebugX( ):
      2. 8.5.2 Extended Data Commands
        1. 8.5.2.1 OperationConfiguration( ): 0x3A and 0x3B
        2. 8.5.2.2 DesignCapacity( ): 0x3C and 0x3D
        3. 8.5.2.3 DataClass( ): 0x3E
        4. 8.5.2.4 DataBlock( ): 0x3F
        5. 8.5.2.5 BlockData( ): 0x40 through 0x5F
        6. 8.5.2.6 BlockDataChecksum( ): 0x60
        7. 8.5.2.7 BlockDataControl( ): 0x61
        8. 8.5.2.8 Reserved: 0x62 through 0x7F
      3. 8.5.3 Block Data Interface
        1. 8.5.3.1 Accessing Block Data
      4. 8.5.4 Access Modes
        1. 8.5.4.1 Sealing and Unsealing Data Blocks
      5. 8.5.5 Data Block Summary
      6. 8.5.6 Detecting Charge Termination
      7. 8.5.7 Communications
        1. 8.5.7.1 I2C Interface
        2. 8.5.7.2 I2C Time Out
        3. 8.5.7.3 I2C Command Waiting Time
        4. 8.5.7.4 I2C Clock Stretching
    6. 8.6 Register Maps
      1. 8.6.1 Operation Configuration (Op Config) Register
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 BAT/REGIN Voltage Sense Input
        2. 9.2.2.2 Integrated LDO Capacitor
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply Decoupling
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Packaging
      1. 13.1.1 Package Dimensions

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VREGIN Regulator input –0.3 6 V
VCC Supply voltage –0.3 2.75 V
VIOD Open-drain I/O pins (SDA, SCL, GPOUT) –0.3 6 V
VBAT BAT input pin –0.3 6 V
VI Input voltage to all other pins (SRX, BIN) –0.3 VCC + 0.3 V
TA Operating free-air temperature –40 85 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±500 V
Charged device model (CDM), per JEDEC specification JESD22-C101(2) ±250
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

TA = 25°C and VREGIN = VBAT = 3.6 V (unless otherwise noted)
MIN NOM MAX UNIT
VREGIN Supply voltage No operating restrictions 2.8 4.5 V
No NVM writes 2.45 2.8
CREGIN External input capacitor for internal LDO between REGIN and VSS Nominal capacitor values specified. Recommend a 5% ceramic X5R type capacitor located close to the device. 0.1 μF
CLDO25 External output capacitor for internal LDO between VCC and VSS 0.47 1 μF
ICC NORMAL operating-mode current(1) Fuel gauge in NORMAL mode.
ILOAD > Sleep Current 		118 μA
ISLP SLEEP mode operating mode current(1) Fuel gauge in SLEEP mode.
ILOAD < Sleep Current 		23 μA
IHIB HIBERNATE operating-mode current(1) Fuel gauge in HIBERNATE mode.
ILOAD < Hibernate Current 		8 μA
ISHD SHUTDOWN mode current(1) Fuel gauge in SHUTDOWN mode.
CE Pin < VIL(CE) maximum 		1 μA
VOL(OD) Output low voltage on open-drain pins (SCL, SDA, GPOUT) IOL = 1 mA 0.4 V
VOH(OD) Output high voltage on open-drain pins (SDA, SCL, GPOUT) External pullup resistor connected to VCC VCC – 0.5 V
VIL Input low voltage, all digital pins 0.6 V
VIH Input high voltage (SDA, SCL) 1.2 V
Input high voltage (BIN) 1.2
VA2 Input voltage (BAT) VSS – 0.125 5 V
VA3 Input voltage (SRX) (1)(2) VSS – 0.04 0.04 V
Ilkg Input leakage current (I/O pins) 0.3 μA
tPUCD Power-up communication delay 250 ms
(1) Specified by design. Not production tested.
(2) Limited by ISRX maximum recommend input current with some margin for the Integrated Sense Resistor tolerance.

7.4 Thermal Information

over operating free-air temperature range (unless otherwise noted)
THERMAL METRIC(1) bq27425-G2 UNIT
YZF [DSBGA]
15 PINS
RθJA Junction-to-ambient thermal resistance 70 °C/W
RθJCtop Junction-to-case (top) thermal resistance 17 °C/W
RθJB Junction-to-board thermal resistance 20 °C/W
ψJT Junction-to-top characterization parameter 1 °C/W
ψJB Junction-to-board characterization parameter 18 °C/W
RθJCbot Junction-to-case (bottom) thermal resistance n/a °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953

7.5 Electrical Characteristics: Power-On Reset

TA = –40°C to 85°C, typical values at TA = 25°C and VREGIN = 3.6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIT+ Positive-going voltage on VCC (Regulator output) 1.98 2.20 2.31 V
VHYS Power-on reset hysteresis 43 115 185 mV

7.6 2.5-V LDO Regulator

TA = –40°C to 85°C, CLDO25 = 1 μF, VREGIN = 3.6 V (unless otherwise noted)
PARAMETER TEST CONDITION MIN NOM MAX UNIT
VREG25 Regulator output voltage 2.7 V ≤ VREGIN ≤ 4.5 V, IOUT ≤ 5 mA 2.4 2.5 2.6 V
2.45 V ≤ VREGIN < 2.7 V (low battery),
IOUT ≤ 3 mA 		2.4
VIH(CE) CE High-level input voltage VREGIN = 2.7 to 4.5 V 2.65 V
VIL(CE) CE Low-level input voltage 0.8

7.7 Integrating ADC (Coulomb Counter) Characteristics

TA = –40°C to 85°C; typical values at TA = 25°C and VREGIN = 3.6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VSR Input voltage (1)(2) VSR = V(SRX) – VSS –0.04 0.04 V
tSR_CONV Conversion time Single conversion 1 s
Resolution 14 15 bits
VOS(SR) Input offset 10 μV
INL Integral nonlinearity error ±0.007 ±0.034 % FSR
ZIN(SR) Effective input resistance(1) 2.5 MΩ
Ilkg(SR) Input leakage current(1) TA = 25°C 0.3 μA
(1) Specified by design. Not tested in production.
(2) Limited by ISRX maximum recommend input current with some margin for the Integrated Sense Resistor tolerance.

7.8 Integrated Sense Resistor Characteristics

TA = –40°C to 85°C; typical values at TA = 25°C and VREGIN = 3.6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SRXRES Resistance of Integrated Sense Resistor from SRX to VSS(1)(2) TA = 25°C 10 mΩ
ISRX Recommended Sense Resistor input current(1)(3) Long term RMS, average device utilization. 2000 mA
Peak RMS current, 10% device utilization.(3) 2500 mA
Peak pulsed current, 250 ms maximum, 1% device utilization.(3) 3500 mA
(1) Specified by design. Not tested in production.
(2) Firmware compensation applied for temperature coefficient of resistor.
(3) Device utilization is the long term usage profile at a specific condition compared to the average condition.

7.9 ADC (Temperature and Cell Measurement) Characteristics

TA = –40°C to 85°C; typical values at TA = 25°C and VREGIN = 3.6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN(ADC) Input voltage 0.05 1 V
GTEMP Temperature sensor voltage gain –2 mV/°C
tADC_CONV Conversion time 125 ms
Resolution 14 15 bits
VOS(ADC) Input offset 1 mV
ZADC Effective input resistance (BAT)(1) Not measuring cell voltage 8 MΩ
Measuring cell voltage 100 kΩ
Ilkg(ADC) Input leakage current(1) TA = 25°C 0.3 μA
(1) Specified by design. Not tested in production.

7.10 EEPROM Memory Characteristics

TA = –40°C to 85°C; typical values at TA = 25°C and VREGIN = 3.6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Array Size 256 bytes
Data retention(1) 10 years
Programming write cycles(1) 100K cycles
(1) Specified by design. Not production tested

7.11 Timing Requirements: I2C-Compatible Interface Communication

TA = –40°C to 85°C; typical values at TA = 25°C and VREGIN = 3.6 V (unless otherwise noted)
MIN NOM MAX UNIT
tr SCL or SDA rise time 300 ns
tf SCL or SDA fall time 300 ns
tw(H) SCL pulse duration (high) 600 ns
tw(L) SCL pulse duration (low) 1.3 μs
tsu(STA) Setup for repeated start 600 ns
td(STA) Start to first falling edge of SCL 600 ns
tsu(DAT) Data setup time 100 ns
th(DAT) Data hold time 0 ns
tsu(STOP) Setup time for stop 600 ns
t(BUF) Bus free time between stop and start 66 μs
fSCL Clock frequency(1) 400 kHz
(1) If the clock frequency (fSCL) is > 100 kHz, use 1-byte write commands for proper operation. All other transactions types are supported at 400 kHz. (See I2C Interface and I2C Command Waiting Time)
bq27425-G2 i2c_comp_lus816.gif Figure 1. I2C-Compatible Interface Timing Diagrams

7.12 Typical Characteristics

bq27425-G2 D001_SLUSBU6.gif
Figure 2. Regulator Output Voltage vs Temperature
bq27425-G2 D003_SLUSBU6.gif
Figure 4. Low-Frequency Oscillator Frequency vs Temperature
bq27425-G2 D002_SLUSBU6.gif
Figure 3. High-Frequency Oscillator Frequency vs Temperature
bq27425-G2 D004_SLUSBU6.gif
Figure 5. Reported Internal Temperature Measurement vs Temperature