SLUSBH1C November   2013  – December 2014

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Thermal Information
    5. 8.5  Supply Current
    6. 8.6  Digital Input and Output DC Characteristics
    7. 8.7  LDO Regulator, Wake-up, and Auto-Shutdown DC Characteristics
    8. 8.8  LDO Regulator, Wake-up, and Auto-shutdown AC Characteristics
    9. 8.9  ADC (Temperature and Cell Measurement) Characteristics
    10. 8.10 Integrating ADC (Coulomb Counter) Characteristics
    11. 8.11 I2C-Compatible Interface Communication Timing Characteristics
    12. 8.12 SHUTDOWN and WAKE-UP Timing
    13. 8.13 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
    5. 9.5 Programming
      1. 9.5.1 Standard Data Commands
      2. 9.5.2 Control(): 0x00 and 0x01
      3. 9.5.3 Extended Data Commands
      4. 9.5.4 Communications
        1. 9.5.4.1 I2C Interface
        2. 9.5.4.2 I2C Time Out
        3. 9.5.4.3 I2C Command Waiting Time
        4. 9.5.4.4 I2C Clock Stretching
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 BAT Voltage Sense Input
        2. 10.2.2.2 Integrated LDO Capacitor
        3. 10.2.2.3 Sense Resistor Selection
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendation
    1. 11.1 Power Supply Decoupling
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

12 Layout

12.1 Layout Guidelines

  • A capacitor of a value of at least 0.47 µF is connected between the VDD pin and VSS. The capacitor should be placed close to the gauge IC and have short traces to both the VDD pin and VSS.
  • It is required to have a capacitor of at least 1.0 µF connect between the BAT pin and VSS if the connection between the battery pack and the gauge BAT pin has the potential to pick up noise. The capacitor should be placed close to the gauge IC and have short traces to both the VDD pin and VSS.
  • If the external pullup resistors on the SCL and SDA lines will be disconnected from the host during low-power operation, it is recommend to use external 1-MΩ pulldown resistors to VSS to avoid floating inputs to the I2C engine.
  • The value of the SCL and SDA pullup resistors should take into consideration the pullup voltage and the bus capacitance. Some recommended values, assuming a bus capacitance of 10 pF, can be seen in Table 4.

    • Table 4. Recommended Values for SCL and SDA Pullup Resistors

    VPU 1.8 V 3.3 V
    RPU Range Typical Range Typical
    400 Ω ≤ RPU ≤ 37.6 kΩ 10 kΩ 900 Ω ≤ RPU ≤ 29.2 kΩ 5.1 kΩ
  • If the GPOUT pin is not used by the host, the pin should still be pulled up to VDD with a 4.7-kΩ or 10-kΩ resistor.
  • If the battery pack thermistor is not connected to the BIN pin, the BIN pin should be pulled down to VSS with a 10-kΩ resistor.
  • The BIN pin should not be shorted directly to VDD or VSS.
  • The actual device ground is pin 3 (VSS).
  • The SRP and SRN pins should be Kelvin connected to the RSENSE terminals. SRP to the battery pack side of RSENSE and SRN to the system side of the RSENSE.
  • Kelvin connect the BAT pin to the battery PACKP terminal.

12.2 Layout Example

bq27441_layoutDiagram.gifFigure 10. bq27441-G1 Board Layout