SLUSAL5C December   2012  – June 2016

PRODUCTION DATA.  

  1. 1 Features
  2. 2  Applications
  3. 3  Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Thermal Information
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Supply Current
    6. 6.6  Digital Input and Output DC Characteristics
    7. 6.7  Power-on Reset
    8. 6.8  2.5-V LDO Regulator
    9. 6.9  Internal Clock Oscillators
    10. 6.10 ADC (Temperature and Cell Measurement) Characteristics
    11. 6.11 Integrating ADC (Coulomb Counter) Characteristics
    12. 6.12 Data Flash Memory Characteristics
    13. 6.13 I2C-Compatible Interface Communication Timing Characteristics
    14. 6.14 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Functional Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power Modes
        1. 7.4.1.1 BAT INSERT CHECK Mode
        2. 7.4.1.2 NORMAL Mode
        3. 7.4.1.3 SLEEP Mode
      2. 7.4.2 SLEEP+ Mode
      3. 7.4.3 HIBERNATE Mode
    5. 7.5 Programming
      1. 7.5.1 Standard Data Commands
      2. 7.5.2 Control(): 0x00/0x01
      3. 7.5.3 Communications
        1. 7.5.3.1 I2C Interface
        2. 7.5.3.2 I2C Time Out
        3. 7.5.3.3 I2C Command Waiting Time
        4. 7.5.3.4 I2C Clock Stretching
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 BAT Voltage Sense Input
        2. 8.2.2.2 SRP and SRN Current Sense Inputs
        3. 8.2.2.3 Sense Resistor Selection
        4. 8.2.2.4 TS Temperature Sense Input
        5. 8.2.2.5 Thermistor Selection
        6. 8.2.2.6 REGIN Power Supply Input Filtering
        7. 8.2.2.7 VCC LDO Output Filtering
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Power Supply Decoupling
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Sense Resistor Connections
      2. 10.1.2 Thermistor Connections
      3. 10.1.3 High-Current and Low-Current Path Separation
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resource
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Power Supply Recommendations

9.1 Power Supply Decoupling

Both the REGIN input pin and the VCC output pin require low equivalent series resistance (ESR) ceramic capacitors placed as closely as possible to the respective pins to optimize ripple rejection and provide a stable and dependable power rail that is resilient to line transients. A 0.1-µF capacitor at the REGIN and a 1-µF capacitor at VCC will suffice for satisfactory device performance.