SLUSBE7C March   2013  – January 2016

PRODUCTION DATA.  

  1. 1 Features
  2. 2  Applications
  3. 3  Description
  4. 4 Revision History
  5. 5 Device Options
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: Supply Current
    6. 7.6  Digital Input and Output DC Characteristics
    7. 7.7  Power-On Reset
    8. 7.8  2.5-V LDO Regulator
    9. 7.9  Internal Clock Oscillators
    10. 7.10 ADC (Temperature and Cell Measurement) Characteristics
    11. 7.11 Integrating ADC (Coulomb Counter) Characteristics
    12. 7.12 Data Flash Memory Characteristics
    13. 7.13 I2C-Compatible Interface Communication Timing Characteristics
    14. 7.14 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Functional Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power Modes
        1. 8.4.1.1 BAT INSERT CHECK Mode
        2. 8.4.1.2 NORMAL Mode
        3. 8.4.1.3 SLEEP Mode
      2. 8.4.2 SLEEP+ Mode
      3. 8.4.3 HIBERNATE Mode
    5. 8.5 Programming
      1. 8.5.1 Data Commands
        1. 8.5.1.1 Standard Data Commands
          1. 8.5.1.1.1 Control(): 0x00/0x01
        2. 8.5.1.2 Charger Data Commands
      2. 8.5.2 Communications
        1. 8.5.2.1 I2C Interface
        2. 8.5.2.2 I2C Time-Out
        3. 8.5.2.3 I2C Command Waiting Time
        4. 8.5.2.4 I2C Clock Stretching
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 BAT Voltage Sense Input
        2. 9.2.2.2 SRP and SRN Current Sense Inputs
        3. 9.2.2.3 Sense Resistor Selection
        4. 9.2.2.4 TS Temperature Sense Input
        5. 9.2.2.5 Thermistor Selection
        6. 9.2.2.6 REGIN Power Supply Input Filtering
        7. 9.2.2.7 VCC LDO Output Filtering
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply Decoupling
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Sense Resistor Connections
      2. 11.1.2 Thermistor Connections
      3. 11.1.3 High-Current and Low-Current Path Separation
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

YZF Package
15-Pin DSBGA
bq27531-G1 bq8035_ds_pinout.gif

Pin Functions

PIN I/O(1) DESCRIPTION
NAME NO.
BAT E2 I Cell voltage measurement input. ADC input. Recommend 4.8 V maximum for conversion accuracy.
BI/TOUT E3 I/O Battery insertion detection input. Power pin for pack thermistor network. Thermistor multiplexer control pin. Use with pullup resistor >1 MΩ (1.8 MΩ typical).
BSDA C3 I/O Battery Charger data line for chipset communication. Push-pull output.
BSCL B2 O Battery Charger clock output line for chipset communication. Push-pull output.
CE D2 I Chip Enable. Internal LDO is disconnected from REGIN when driven low. Note: CE has an internal ESD protection diode connected to REGIN. Recommend maintaining VCE ≤ VREGIN under all conditions.
REGIN E1 P Regulator input. Decouple with 0.1-μF ceramic capacitor to Vss.
SCL A3 I Slave I2C serial communications clock input line for communication with system (Master). Open-drain I/O. Use with 10-kΩ pullup resistor (typical).
SDA B3 I/O Slave I2C serial communications data line for communication with system (Master). Open-drain I/O. Use with 10-kΩ pullup resistor (typical).
SOC_INT A2 I/O SOC state interrupts output. Generates a pulse as described in the bq27531-G1 Technical Reference Manual (SLUUA96). Open-drain output.
SRN B1 IA Analog input pin connected to the internal coulomb counter where SRN is nearest the Vss connection. Connect to 5-mΩ to 20-mΩ sense resistor.
SRP A1 IA Analog input pin connected to the internal coulomb counter where SRP is nearest the PACK– connection. Connect to 5-mΩ to 20-mΩ sense resistor.
TS D3 IA Pack thermistor voltage sense (use 103AT-type thermistor). ADC input.
VCC D1 P Regulator output and bq27531-G1 power. Decouple with 1-μF ceramic capacitor to Vss.
VSS C1, C2 P Device ground
(1) I/O = Digital input/output, IA = Analog input, P = Power connection