SLUSAT0E October 2012 – May 2018
PRODUCTION DATA.
The default bq27545-G1 behaves as an HDQ slave only device when HDQ mode is enabled. If the HDQ interrupt function is enabled, the bq27545-G1 is capable of mastering and also communicating to a HDQ device. There is no mechanism for negotiating who is to function as the HDQ master and take care to avoid message collisions. The interrupt is signaled to the host processor with the bq27545-G1 mastering an HDQ message. This message is a fixed message that will be used to signal the interrupt condition. The message itself is 0x80 (slave write to register 0x00) with no data byte being sent as the command is not intended to convey any status of the interrupt condition. The HDQ interrupt function is disabled by default and must be enabled by command.
When the SET_HDQINTEN subcommand is received, the bq27545-G1 will detect any of the interrupt conditions and assert the interrupt at one second intervals until the CLEAR_HDQINTEN command is received or the count of HDQHostIntrTries has lapsed.
The number of tries for interrupting the host is determined by the data flash parameter named HDQHostIntrTries.