SLUSAT0E October   2012  – May 2018

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: Supply Current
    6. 7.6  Electrical Characteristics: Digital Input and Output DC
    7. 7.7  Electrical Characteristics: Power-On Reset
    8. 7.8  Electrical Characteristics: 2.5-V LDO Regulator
    9. 7.9  Electrical Characteristics: Internal Clock Oscillators
    10. 7.10 Electrical Characteristics: Integrating ADC (Coulomb Counter) Characteristics
    11. 7.11 Electrical Characteristics: ADC (Temperature and Cell Voltage)
    12. 7.12 Electrical Characteristics: Data Flash Memory
    13. 7.13 HDQ Communication Timing Characteristics
    14. 7.14 I2C-Compatible Interface Timing Characteristics
    15. 7.15 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Fuel Gauging
      2. 8.3.2 Impedance Track Variables
        1. 8.3.2.1  Load Mode
        2. 8.3.2.2  Load Select
        3. 8.3.2.3  Reserve Cap-mAh
        4. 8.3.2.4  Reserve Energy
        5. 8.3.2.5  Design Energy Scale
        6. 8.3.2.6  Dsg Current Threshold
        7. 8.3.2.7  Chg Current Threshold
        8. 8.3.2.8  Quit Current, Dsg Relax Time, Chg Relax Time, and Quit Relax Time
        9. 8.3.2.9  Qmax
        10. 8.3.2.10 Update Status
        11. 8.3.2.11 Avg I Last Run
        12. 8.3.2.12 Avg P Last Run
        13. 8.3.2.13 Delta Voltage
        14. 8.3.2.14 Ra Tables and Ra Filtering Related Parameters
        15. 8.3.2.15 MaxScaleBackGrid
        16. 8.3.2.16 Max DeltaV, Min DeltaV
        17. 8.3.2.17 Qmax Max Delta %
        18. 8.3.2.18 Fast Resistance Scaling
        19. 8.3.2.19 StateOfCharge() Smoothing
        20. 8.3.2.20 DeltaV Max Delta
        21. 8.3.2.21 Lifetime Data Logging Parameters
    4. 8.4 Device Functional Modes
      1. 8.4.1  System Control Function
        1. 8.4.1.1 SHUTDOWN Mode
        2. 8.4.1.2 INTERRUPT Mode
        3. 8.4.1.3 Battery Level Indication
        4. 8.4.1.4 Internal Short Detection
        5. 8.4.1.5 Tab Disconnection Detection
      2. 8.4.2  Temperature Measurement and the TS Input
      3. 8.4.3  Over-Temperature Indication
        1. 8.4.3.1 Over-Temperature: Charge
        2. 8.4.3.2 Over-Temperature: Discharge
      4. 8.4.4  Charging and Charge Termination Indication
        1. 8.4.4.1 Detection Charge Termination
        2. 8.4.4.2 Charge Inhibit
      5. 8.4.5  Power Modes
        1. 8.4.5.1 NORMAL Mode
        2. 8.4.5.2 SLEEP Mode
        3. 8.4.5.3 FULLSLEEP Mode
        4. 8.4.5.4 HIBERNATE Mode
      6. 8.4.6  Power Control
        1. 8.4.6.1 Reset Functions
        2. 8.4.6.2 Wake-Up Comparator
        3. 8.4.6.3 Flash Updates
      7. 8.4.7  Autocalibration
      8. 8.4.8  Communications
        1. 8.4.8.1 Authentication
        2. 8.4.8.2 Key Programming (Data Flash Key)
        3. 8.4.8.3 Key Programming (Secure Memory Key)
        4. 8.4.8.4 Executing An Authentication Query
      9. 8.4.9  HDQ Single-Pin Serial Interface
      10. 8.4.10 HDQ Host Interruption Feature
        1. 8.4.10.1 Low Battery Capacity
        2. 8.4.10.2 Temperature
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
        1. 8.5.1.1 I2C Time-Out
        2. 8.5.1.2 I2C Command Waiting Time
        3. 8.5.1.3 I2C Clock Stretching
      2. 8.5.2 Data Commands
        1. 8.5.2.1 Standard Data Commands
          1. 8.5.2.1.1  Control(): 0x00 and 0x01
            1. 8.5.2.1.1.1  CONTROL_STATUS: 0x0000
            2. 8.5.2.1.1.2  DEVICE_TYPE: 0x0001
            3. 8.5.2.1.1.3  FW_VERSION: 0x0002
            4. 8.5.2.1.1.4  HW_VERSION: 0x0003
            5. 8.5.2.1.1.5  RESET_DATA: 0x0005
            6. 8.5.2.1.1.6  PREV_MACWRITE: 0x0007
            7. 8.5.2.1.1.7  CHEM_ID: 0x0008
            8. 8.5.2.1.1.8  BOARD_OFFSET: 0x0009
            9. 8.5.2.1.1.9  CC_OFFSET: 0x000a
            10. 8.5.2.1.1.10 CC_OFFSET_SAVE: 0x000b
            11. 8.5.2.1.1.11 DF_VERSION: 0x000c
            12. 8.5.2.1.1.12 SET_FULLSLEEP: 0x0010
            13. 8.5.2.1.1.13 SET_HIBERNATE: 0x0011
            14. 8.5.2.1.1.14 CLEAR_HIBERNATE: 0x0012
            15. 8.5.2.1.1.15 SET_SHUTDOWN: 0x0013
            16. 8.5.2.1.1.16 CLEAR_SHUTDOWN: 0x0014
            17. 8.5.2.1.1.17 SET_HDQINTEN: 0x0015
            18. 8.5.2.1.1.18 CLEAR_HDQINTEN: 0x0016
            19. 8.5.2.1.1.19 STATIC_CHEM_DF_CHKSUM: 0x0017
            20. 8.5.2.1.1.20 SEALED: 0x0020
            21. 8.5.2.1.1.21 IT ENABLE: 0x0021
            22. 8.5.2.1.1.22 RESET: 0x0041
            23. 8.5.2.1.1.23 EXIT_CAL: 0x0080
            24. 8.5.2.1.1.24 Enter_cal: 0x0081
            25. 8.5.2.1.1.25 OFFSET_CAL: 0x0082
          2. 8.5.2.1.2  AtRate(): 0x02 and 0x03
          3. 8.5.2.1.3  UnfilteredSOC(): 0x04 And 0x05
          4. 8.5.2.1.4  Temperature(): 0x06 And 0x07
          5. 8.5.2.1.5  Voltage(): 0x08 And 0x09
          6. 8.5.2.1.6  Flags(): 0x0a And 0x0b
          7. 8.5.2.1.7  NominalAvailableCapacity(): 0x0c and 0x0d
          8. 8.5.2.1.8  FullAvailableCapacity(): 0x0e and 0x0f
          9. 8.5.2.1.9  RemainingCapacity(): 0x10 and 0x11
          10. 8.5.2.1.10 FullChargeCapacity(): 0x12 and 0x13
          11. 8.5.2.1.11 AverageCurrent(): 0x14 and 0x15
          12. 8.5.2.1.12 TimeToEmpty(): 0x16 And 0x17
          13. 8.5.2.1.13 FilteredFCC(): 0x18 And 0x19
          14. 8.5.2.1.14 StandbyCurrent(): 0x1a And 0x1b
          15. 8.5.2.1.15 UnfilteredFCC(): 0x1c And 0x1d
          16. 8.5.2.1.16 MaxLoadCurrent(): 0x1e And 0x1f
          17. 8.5.2.1.17 UnfilteredRM(): 0x20 And 0x21
          18. 8.5.2.1.18 FilteredRM(): 0x22 And 0x23
          19. 8.5.2.1.19 AveragePower(): 0x24 And 0x25
          20. 8.5.2.1.20 InternalTemperature(): 0x28 And 0x29
          21. 8.5.2.1.21 CycleCount(): 0x2a And 0x2b
          22. 8.5.2.1.22 StateOfCharge(): 0x2c And 0x2d
          23. 8.5.2.1.23 StateOfHealth(): 0x2e And 0x2f
          24. 8.5.2.1.24 PassedCharge(): 0x34 And 0x35
          25. 8.5.2.1.25 Dod0(): 0x36 And 0x37
          26. 8.5.2.1.26 SelfDischargeCurrent(): 0x38 And 0x39
      3. 8.5.3 Extended Data Commands
        1. 8.5.3.1  PackConfig(): 0x3a and 0x3b
        2. 8.5.3.2  DesignCapacity(): 0x3c And 0x3d
        3. 8.5.3.3  DataFlashClass(): 0x3e
        4. 8.5.3.4  DataFlashBlock(): 0x3f
        5. 8.5.3.5  BlockData(): 0x40 Through 0x5f
        6. 8.5.3.6  BlockDataChecksum(): 0x60
        7. 8.5.3.7  BlockDataControl(): 0x61
        8. 8.5.3.8  DeviceNameLength(): 0x62
        9. 8.5.3.9  DeviceName(): 0x63 Through 0x6c
        10. 8.5.3.10 Reserved: 0x6a Through 0x7f
      4. 8.5.4 Data Flash Interface
        1. 8.5.4.1 Accessing the Data Flash
        2. 8.5.4.2 Manufacturer Information Blocks
      5. 8.5.5 Access Modes
      6. 8.5.6 Sealing and Unsealing Data Flash
      7. 8.5.7 Data Flash Summary
    6. 8.6 Register Maps
      1. 8.6.1 Pack Configuration Register
        1. Table 1. Pack Configuration Bit Definition
      2. 8.6.2 Pack Configuration B Register
        1. Table 2. Pack Configuration B Bit Definition
      3. 8.6.3 Pack Configuration C Register
        1. Table 3. Pack Configuration C Bit Definition
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 BAT Voltage Sense Input
        2. 9.2.2.2 SRP and SRN Current Sense Inputs
        3. 9.2.2.3 Sense Resistor Selection
        4. 9.2.2.4 TS Temperature Sense Input
        5. 9.2.2.5 Thermistor Selection
        6. 9.2.2.6 REGIN Power Supply Input Filtering
        7. 9.2.2.7 VCC LDO Output Filtering
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply Decoupling
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Sense Resistor Connections
      2. 11.1.2 Thermistor Connections
      3. 11.1.3 High-Current and Low-Current Path Separation
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.5.1.3 I2C Clock Stretching

I2C clock stretches can occur during all modes of fuel gauge operation. In the SLEEP and HIBERNATE modes, a short clock stretch will occur on all I2C traffic as the device must wake up to process the packet. In NORMAL and SLEEP+ modes, clock stretching will only occur for packets addressed for the fuel gauge. The timing of stretches will vary as interactions between the communicating host and the gauge are asynchronous. The I2C clock stretches may occur after start bits, the ACK/NAK bit and first data bit transmit on a host read cycle. The majority of clock stretch periods are small (≤ 4 ms) as the I2C interface peripheral and CPU firmware perform normal data flow control. However, less frequent but more significant clock stretch periods may occur when data flash (DF) is being written by the CPU to update the resistance (Ra) tables and other DF parameters such as Qmax. Due to the organization of DF, updates must be written in data blocks consisting of multiple data bytes.

An Ra table update requires erasing a single page of DF, programming the updated Ra table and a flag. The potential I2C clock stretching time is 24-ms max. This includes 20-ms page erase and 2-ms row programming time (×2 rows). The Ra table updates occur during the discharge cycle and at up to 15 resistance grid points that occur during the discharge cycle.

A DF block write typically requires a maximum of 72 ms. This includes copying data to a temporary buffer and updating DF. This temporary buffer mechanism is used to protect from power failure during a DF update. The first part of the update requires 20 ms time to erase the copy buffer page, 6 ms to write the data into the copy buffer and the program progress indicator (2 ms for each individual write). The second part of the update is writing to the DF and requires 44-ms DF block update time. This includes a 20 ms each page erase for two pages and 2 ms each row write for two rows.

In the event that a previous DF write was interrupted by a power failure or reset during the DF write, an additional 44-ms max DF restore time is required to recover the data from a previously interrupted DF write. In this power failure recovery case, the total I2C clock stretching is 116-ms max.

Another case where I2C clock stretches is at the end of discharge. The update to the last discharge data will go through the DF block update twice because two pages are used for the data storage. The clock stretching in this case is 144-ms max. This occurs if there has been a Ra table update during the discharge.