SLUSC53B
May 2015 – May 2018
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Simplified Schematic
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Supply Current
7.6
Digital Input and Output DC Characteristics
7.7
Power-On Reset
7.8
2.5-V LDO Regulator
7.9
Internal Clock Oscillators
7.10
Integrating ADC (Coulomb Counter) Characteristics
7.11
ADC (Temperature and Cell Voltage) Characteristics
7.12
Data Flash Memory Characteristics
7.13
HDQ Communication Timing Characteristics
7.14
I2C-Compatible Interface Timing Characteristics
7.15
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Fuel Gauging
8.3.2
Impedance Track Variables
8.3.3
Power Control
8.3.3.1
Reset Functions
8.3.3.2
Wake-Up Comparator
8.3.3.3
Flash Updates
8.3.4
Autocalibration
8.3.5
Communications
8.3.5.1
Authentication
8.3.5.2
Key Programming (Data Flash Key)
8.3.5.3
Key Programming (Secure Memory Key)
8.3.5.4
Executing an Authentication Query
8.3.5.5
HDQ Single-Pin Serial Interface
8.3.5.6
HDQ Host Interruption Feature
8.3.5.6.1
Low Battery Capacity
8.3.5.6.2
Temperature
8.3.5.7
I2C Interface
8.3.5.7.1
I2C Time Out
8.3.5.7.2
I2C Command Waiting Time
8.3.5.7.3
I2C Clock Stretching
8.4
Device Functional Modes
8.4.1
Power Modes
8.4.1.1
NORMAL Mode
8.4.1.2
SLEEP Mode
8.4.1.3
FULLSLEEP Mode
8.4.1.4
HIBERNATE Mode
8.4.2
System Control Function
8.4.2.1
SHUTDOWN Mode
8.4.2.2
INTERRUPT Mode
8.4.3
Security Modes
8.4.3.1
Sealing and Unsealing Data Flash
8.5
Programming
8.5.1
Standard Data Commands
8.5.1.1
Control(): 0x00 and 0x01
8.6
Register Maps
8.6.1
Pack Configuration Register
8.6.2
Pack Configuration B Register
8.6.3
Pack Configuration C Register
9
Application and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
BAT Voltage Sense Input
9.2.2.2
SRP and SRN Current Sense Inputs
9.2.2.3
Sense Resistor Selection
9.2.2.4
TS Temperature Sense Input
9.2.2.5
Thermistor Selection
9.2.2.6
REGIN Power Supply Input Filtering
9.2.2.7
VCC LDO Output Filtering
9.3
Application Curves
10
Power Supply Recommendations
10.1
Power Supply Decoupling
11
Layout
11.1
Layout Guidelines
11.1.1
Sense Resistor Connections
11.1.2
Thermistor Connections
11.1.3
High-Current and Low-Current Path Separation
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Community Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
YZF|15
MXBG070J
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slusc53b_oa
slusc53b_pm
11.2
Layout Example
Figure 15.
Layout Example