SLUSBV9D March 2014 – January 2018
PRODUCTION DATA.
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
VFETON | CHG and DSG FETs on | IL = 1 µA TA = –40°C to 85°C |
2 × VVPWR – 0.4 | 2 × VVPWR – 0.2 | 2 × VVPWR | V |
VFETOFF | CHG and DSG FETs off | TA = –40°C to 85°C | 0.2 | V | ||
VFETRIPPLE(1) | CHG and DSG FETs on | IL = 1 µA TA = –40°C to 85°C |
0.1 | VPP | ||
tFETON | FET gate rise time (10% to 90%) |
CL = 4 nF TA = –40°C to 85°C No series resistance |
67 | 140 | 218 | μs |
tFETOFF | FET gate fall time (90% to 10%) |
CL = 4 nF TA = –40°C to 85°C No series resistance |
10 | 30 | 60 | μs |