SLUSBU5U November   2013  – October 2024 BQ2961 , BQ2962

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Pin Details
        1. 7.3.1.1 Input Sense Voltage, Vx
        2. 7.3.1.2 Output Drive, OUT
        3. 7.3.1.3 Supply Input, VDD
        4. 7.3.1.4 Regulated Supply Output, REG
      2. 7.3.2 Overvoltage Sensing for OUT
      3. 7.3.3 Regulated Output Voltage and REG_EN Pin
    4. 7.4 Device Functional Modes
      1. 7.4.1 NORMAL Mode
      2. 7.4.2 OVERVOLTAGE Mode
      3. 7.4.3 UNDERVOLTAGE Mode
      4. 7.4.4 CUSTOMER TEST MODE
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  10. Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

CUSTOMER TEST MODE

The Customer Test Mode (CTM) helps to reduce test time for checking the overvoltage delay-timer parameter once the circuit is implemented into the battery pack. To enter CTM, the VDD pin should be set at least 10 V higher than V3 (see Figure 7-3). The delay timer is greater than 10 ms, but considerably shorter than the timer delay in normal operation. To exit CTM, remove the VDD to VC3 voltage differential of 10 V, so that the decrease in the value automatically causes an exit.

CAUTION:

Avoid exceeding any Absolute Maximum Voltages on any pins when placing the device into CTM. Also avoid exceeding Absolute Maximum Voltages for the individual cell voltages (V3–V2), (V2–V1) and (V1–VSS). Stressing the pins beyond the rated limits can cause permanent damage to the device.

Figure 7-3 shows the timing for the Customer Test Mode.

BQ2961 BQ2962 Timing for Customer Test ModeFigure 7-3 Timing for Customer Test Mode

Figure 7-4 shows the measurement for current consumption of the product for both VDD and Vx.

BQ2961 BQ2962 Configuration for Integrated Circuit Current Consumption TestFigure 7-4 Configuration for Integrated Circuit Current Consumption Test