SLUSCS3K October   2017  – July 2024 BQ2980 , BQ2982

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
      1. 7.1.1 Device Configurability
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Overvoltage (OV) Status
      2. 7.3.2 Undervoltage (UV) Status
      3. 7.3.3 Overcurrent in Charge (OCC) Status
      4. 7.3.4 Overcurrent in Discharge (OCD) and Short Circuit in Discharge (SCD) Status
      5. 7.3.5 Overtemperature (OT) Status
      6. 7.3.6 Charge and Discharge Driver
      7. 7.3.7 CTR for FET Override and Device Shutdown
      8. 7.3.8 CTR for PTC Connection
      9. 7.3.9 ZVCHG (0-V Charging)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power Modes
        1. 7.4.1.1 Power-On-Reset (POR)
        2. 7.4.1.2 NORMAL Mode
        3. 7.4.1.3 FAULT Mode
        4. 7.4.1.4 SHUTDOWN Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Test Circuits for Device Evaluation
      2. 8.1.2 Test Circuit Diagrams
      3. 8.1.3 Using CTR as FET Driver On/Off Control
    2. 8.2 Typical Applications
      1. 8.2.1 BQ298x Configuration 1: System-Controlled Reset/Shutdown Function
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Selection of Power FET
        4. 8.2.1.4 Application Curves
      2. 8.2.2 BQ298x Configuration 2: CTR Function Disabled
      3. 8.2.3 BQ298x Configuration 3: PTC Thermistor Protection
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.1.1 Test Circuits for Device Evaluation

  1. Test Power Consumption (Test Circuit 1)

    This setup is suitable to test for device power consumption at different power modes. VS1 is a voltage source that simulates a battery cell. VS2 is used to simulate a charger and load under different power mode conditions.

    I1 is a current meter that monitors the device power consumption at different modes. I2 is a current meter that monitors the PACK pin current. The IPACK current is insignificant in most operation modes. If a charger is connected (VS2 has a positive voltage), but the device is still in SHUTDOWN mode, I2 reflects the IPACK current drawing from the charger due to the internal RPACK-VSS resistor.

  2. Test CHG and DSG Voltage and Status (Test Circuit 2)

    This setup is suitable to test VCHG and VDSG levels or monitor the CHG and DSG status at different operation modes. It is not suitable to measure power consumption of the device, because the meters (or scope probes) connected to CHG and/or DSG increase the charge pump loading beyond the normal application condition. Therefore, the current consumption of the device under this setup is greatly increased.

  3. Test for Fault Protection (Test Circuit 3)

    This setup is suitable to test OV, UV, OCD, OCD, and SCD protections.

    Voltage protection:

    Adjust VS1 to simulation OV and UV. TI recommends having 0 V on VS3 during the voltage test to avoid generating multiple faults. Adjust VS2 to simulate the charger/load connection or disconnection. Combine with test circuit 1 to monitor power consumption, or combine with test circuit 2 to monitor CHG and DSG status.

    Test example for OV fault and OV recovery by charger removal:

    1. Adjust both VS1 and VS2 > OVP threshold.
    2. As the device triggers for OVP and CHG is open, VS2 can be set to a maximum expected charger voltage as if in an actual application when CHG is open, and charger voltage may regulate to the maximum setting.
    3. To test for OV recovery, adjust VS1 below (VOVP – VOVP_Hys). Reduce the VS2 voltage so that (VS2 – VS1) < 100 mV (to emulate removal of a charger).

    Current protection:

    Similar to the voltage protection test, adjust VS3 to simulate OCC, OCD, and SCD thresholds. Use VS2 to simulate a charger/load status. TI recommends setting VS1 to the normal level to avoid triggering multiple faults.

    Note:

    It is normal to observe CHG or DSG flipping on and off if VS2 is not set up properly to simulate a charger or load connection/disconnection, especially when the voltage source is used to simulate fault conditions. It is because an improper VS2 setting may mislead the device to sense a recovery condition immediately after a fault protection is triggered.

  4. Test for CTR Control (Test Circuit 4)

    This setup is suitable to test for CTR control. Adjust VS4 above or below the CTR VIH or VIL level. Combine with test circuit 1 to observe the power consumption, or combine with test circuit 2 to observe the CHG and DSG status.