SLUS987C January 2011 – December 2019 BQ33100
PRODUCTION DATA.
This register enables, disables, or configures various features of the BQ33100.
SUBCLASS ID | SUBCLASS NAME | OFFSET | NAME | FORMAT | SIZE IN BYTES | MIN VALUE | MAX VALUE | DEFAULT VALUE | UNIT |
---|---|---|---|---|---|---|---|---|---|
64 | Registers | 0 | Operation Cfg | Hex | 2 | 0x0000 | 0xffff | 0x04a8 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RSVD | RSVD | RSVD | RSVD | RSVD | CC2 | CC1 | CC0 |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RSVD | LT_EN | RSVD | TEMP1 | TEMP0 | RSVD | RSVD | STACK |
LEGEND: RSVD = Reserved and must be programmed to 0 unless otherwise specified.
CC2, CC1, CC0—These bits configure the BQ33100 for the number of series capacitors in the super capacitor stack.
0,0,0 = Reserved
0,0,1 = 2 capacitors
0,1,0 = 3 capacitors (default)
0,1,1 = 4 capacitors
1,0,0 = 5 capacitors
LT_EN—Lifetime Data logging bit; this bit enables or disables Lifetime Data logging from occurring. This bit can be directly set by the Lifetime Enable command.
0 = All Lifetime Data logging is prevented from occurring.
1 = All Lifetime Data logging is allowed.
TEMP1, TEMP0—These bits configure the source of the Temperature function.
0,0 = Internal Temperature Sensor
0,1 = TS Input (default)
STACK—This bit configure the BQ33100 to measure all series voltages up to 5-series cells or just the stack voltage.
0 = Each series cell is measured and can be balanced up to 5-series capacitors.
1 = The capacitor stack is measured and Capacitor Balancing and Cell Imbalance Detection are disabled.