SLUSBZ5D January   2015  – April 2021 BQ34Z100-G1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: Power-On Reset
    6. 6.6  Electrical Characteristics: LDO Regulator
    7. 6.7  Electrical Characteristics: Internal Temperature Sensor Characteristics
    8. 6.8  Electrical Characteristics: Low-Frequency Oscillator
    9. 6.9  Electrical Characteristics: High-Frequency Oscillator
    10. 6.10 Electrical Characteristics: Integrating ADC (Coulomb Counter) Characteristics
    11. 6.11 Electrical Characteristics: ADC (Temperature and Cell Measurement) Characteristics
    12. 6.12 Electrical Characteristics: Data Flash Memory Characteristics
    13. 6.13 Timing Requirements: HDQ Communication
    14. 6.14 Timing Requirements: I2C-Compatible Interface
    15. 6.15 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Data Commands
        1. 7.3.1.1  Standard Data Commands
        2. 7.3.1.2  Control(): 0x00/0x01
          1. 7.3.1.2.1  CONTROL_STATUS: 0x0000
          2. 7.3.1.2.2  DEVICE TYPE: 0x0001
          3. 7.3.1.2.3  FW_VERSION: 0x0002
          4. 7.3.1.2.4  HW_VERSION: 0x0003
          5. 7.3.1.2.5  RESET_DATA: 0x0005
          6. 7.3.1.2.6  PREV_MACWRITE: 0x0007
          7. 7.3.1.2.7  CHEM ID: 0x0008
          8. 7.3.1.2.8  BOARD_OFFSET: 0x0009
          9. 7.3.1.2.9  CC_OFFSET: 0x000A
          10. 7.3.1.2.10 CC_OFFSET_SAVE: 0x000B
          11. 7.3.1.2.11 DF_VERSION: 0x000C
          12. 7.3.1.2.12 SET_FULLSLEEP: 0x0010
          13. 7.3.1.2.13 STATIC_CHEM_DF_CHKSUM: 0x0017
          14. 7.3.1.2.14 SEALED: 0x0020
          15. 7.3.1.2.15 IT ENABLE: 0x0021
          16. 7.3.1.2.16 CAL_ENABLE: 0x002D
          17. 7.3.1.2.17 RESET: 0x0041
          18. 7.3.1.2.18 EXIT_CAL: 0x0080
          19. 7.3.1.2.19 ENTER_CAL: 0x0081
          20. 7.3.1.2.20 OFFSET_CAL: 0x0082
        3. 7.3.1.3  StateOfCharge(): 0x02
        4. 7.3.1.4  MaxError(): 0x03
        5. 7.3.1.5  RemainingCapacity(): 0x04/0x05
        6. 7.3.1.6  FullChargeCapacity(): 0x06/07
        7. 7.3.1.7  Voltage(): 0x08/0x09
        8. 7.3.1.8  AverageCurrent(): 0x0A/0x0B
        9. 7.3.1.9  Temperature(): 0x0C/0x0D
        10. 7.3.1.10 Flags(): 0x0E/0x0F
        11. 7.3.1.11 FlagsB(): 0x12/0x13
        12. 7.3.1.12 Current(): 0x10/0x11
      2. 7.3.2  Extended Data Commands
        1. 7.3.2.1  AverageTimeToEmpty(): 0x18/0x19
        2. 7.3.2.2  AverageTimeToFull(): 0x1A/0x1B
        3. 7.3.2.3  PassedCharge(): 0x1C/0x1D
        4. 7.3.2.4  DOD0Time(): 0x1E/0x1F
        5. 7.3.2.5  AvailableEnergy(): 0x24/0x25
        6. 7.3.2.6  AveragePower(): 0x26/0x27
        7. 7.3.2.7  SerialNumber(): 0x28/0x29
        8. 7.3.2.8  InternalTemperature(): 0x2A/0x2B
        9. 7.3.2.9  CycleCount(): 0x2C/0x2D
        10. 7.3.2.10 StateOfHealth(): 0x2E/0x2F
        11. 7.3.2.11 ChargeVoltage(): 0x30/0x31
        12. 7.3.2.12 ChargeCurrent(): 0x32/0x33
        13. 7.3.2.13 PackConfiguration(): 0x3A/0x3B
        14. 7.3.2.14 DesignCapacity(): 0x3C/0x3D
        15. 7.3.2.15 DataFlashClass(): 0x3E
        16. 7.3.2.16 DataFlashBlock(): 0x3F
        17. 7.3.2.17 AuthenticateData/BlockData(): 0x40…0x53
        18. 7.3.2.18 AuthenticateChecksum/BlockData(): 0x54
        19. 7.3.2.19 BlockData(): 0x55…0x5F
        20. 7.3.2.20 BlockDataChecksum(): 0x60
        21. 7.3.2.21 BlockDataControl(): 0x61
        22. 7.3.2.22 GridNumber(): 0x62
        23. 7.3.2.23 LearnedStatus(): 0x63
        24. 7.3.2.24 Dod@Eoc(): 0x64/0x65
        25. 7.3.2.25 QStart(): 0x66/0x67
        26. 7.3.2.26 TrueRC(): 0x68/0x69
        27. 7.3.2.27 TrueFCC(): 0x6A/0x6B
        28. 7.3.2.28 StateTime(): 0x6C/0x6D
        29. 7.3.2.29 QmaxPassedQ(): 0x6E/0x6F
        30. 7.3.2.30 DOD0(): 0x70/0x71
        31. 7.3.2.31 QmaxDod0(): 0x72/0x73
        32. 7.3.2.32 QmaxTime(): 0x74/0x75
      3. 7.3.3  Data Flash Interface
        1. 7.3.3.1 Accessing Data Flash
        2. 7.3.3.2 Manufacturer Information Block
        3. 7.3.3.3 Access Modes
        4. 7.3.3.4 Sealing/Unsealing Data Flash Access
      4. 7.3.4  Data Flash Summary
      5. 7.3.5  Fuel Gauging
      6. 7.3.6  Impedance Track Variables
        1. 7.3.6.1  Load Mode
        2. 7.3.6.2  Load Select
        3. 7.3.6.3  Reserve Cap-mAh
        4. 7.3.6.4  Reserve Cap-mWh/cWh
        5. 7.3.6.5  Design Energy Scale
        6. 7.3.6.6  Dsg Current Threshold
        7. 7.3.6.7  Chg Current Threshold
        8. 7.3.6.8  Quit Current, Dsg Relax Time, Chg Relax Time, and Quit Relax Time
        9. 7.3.6.9  Qmax
        10. 7.3.6.10 Update Status
        11. 7.3.6.11 Avg I Last Run
        12. 7.3.6.12 Avg P Last Run
        13. 7.3.6.13 Cell Delta Voltage
        14. 7.3.6.14 Ra Tables
        15. 7.3.6.15 StateOfCharge() Smoothing
        16. 7.3.6.16 Charge Efficiency
        17. 7.3.6.17 Lifetime Data Logging
      7. 7.3.7  Device Configuration
        1. 7.3.7.1 Pack Configuration Register
        2. 7.3.7.2 Pack Configuration B Register
        3. 7.3.7.3 Pack Configuration C Register
      8. 7.3.8  Voltage Measurement and Calibration
        1. 7.3.8.1 1S Example
        2. 7.3.8.2 7S Example
        3. 7.3.8.3 Autocalibration
      9. 7.3.9  Temperature Measurement
      10. 7.3.10 Overtemperature Indication
        1. 7.3.10.1 Overtemperature: Charge
        2. 7.3.10.2 Overtemperature: Discharge
      11. 7.3.11 Charging and Charge Termination Indication
      12. 7.3.12 SCALED Mode
      13. 7.3.13 LED Display
      14. 7.3.14 Alert Signal
      15. 7.3.15 Communications
        1. 7.3.15.1 Authentication
        2. 7.3.15.2 Key Programming
        3. 7.3.15.3 Executing an Authentication Query
        4. 7.3.15.4 HDQ Single-Pin Serial Interface
        5. 7.3.15.5 I2C Interface
        6. 7.3.15.6 Switching Between I2C and HDQ Modes
          1. 7.3.15.6.1 Converting to HDQ Mode
          2. 7.3.15.6.2 Converting to I2C Mode
      16. 7.3.16 Power Control
        1. 7.3.16.1 Reset Functions
        2. 7.3.16.2 Wake-Up Comparator
        3. 7.3.16.3 Flash Updates
    4. 7.4 Device Functional Modes
      1. 7.4.1 NORMAL Mode
      2. 7.4.2 SLEEP Mode
      3. 7.4.3 FULL SLEEP Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Step-by-Step Design Procedure
          1. 8.2.2.1.1 STEP 1: Review and Modify the Data Flash Configuration Data.
          2. 8.2.2.1.2 STEP 2: Review and Modify the Data Flash Configuration Registers.
          3. 8.2.2.1.3 STEP 3: Design and Configure the Voltage Divider.
          4. 8.2.2.1.4 STEP 4: Determine the Sense Resistor Value.
          5. 8.2.2.1.5 STEP 5: Review and Modify the Data Flash Gas Gauging Configuration, Data, and State.
          6. 8.2.2.1.6 STEP 6: Determine and Program the Chemical ID.
          7. 8.2.2.1.7 STEP 7: Calibrate.
          8. 8.2.2.1.8 STEP 8: Run an Optimization Cycle.
      3. 8.2.3 Battery Chemistry Configuration
        1. 8.2.3.1 Battery Chemistry Charge Termination
      4. 8.2.4 Replaceable Battery Systems
      5. 8.2.5 Digital Interface Options
      6. 8.2.6 Display Options
      7. 8.2.7 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Introduction
      2. 10.1.2 Power Supply Decoupling Capacitor
      3. 10.1.3 Capacitors
      4. 10.1.4 Communication Line Protection Components
    2. 10.2 Layout Example
      1. 10.2.1 Ground System
      2. 10.2.2 Kelvin Connections
      3. 10.2.3 Board Offset Considerations
      4. 10.2.4 ESD Spark Gap
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.15.4 HDQ Single-Pin Serial Interface

The HDQ interface is an asynchronous return-to-one protocol where a processor sends the command code to the device. With HDQ, the least significant bit (LSB) of a data byte (command) or word (data) is transmitted first. Note that the DATA signal on pin 12 is open-drain and requires an external pull-up resistor. The 8-bit command code consists of two fields: the 7-bit HDQ command code (bits 0–6) and the 1-bit R/W field (MSB Bit 7). The R/W field directs the device either to:

  • Store the next 8 or 16 bits of data to a specified register or
  • Output 8 or 16 bits of data from the specified register.

The HDQ peripheral can transmit and receive data as either an HDQ master or slave.

The return-to-one data bit frame of HDQ consists of three distinct sections. The first section is used to start the transmission by either the host or by the device taking the DATA pin to a logic-low state for a time tSTRH,B. The next section is for data transmission where the data is valid for a time tDSU after the negative edge used to start communication. The data is held until a time tDV, allowing the host or device time to sample the data bit. The final section is used to stop the transmission by returning the DATA pin to a logic-high state by at least a time tSSU after the negative edge used to start communication. The final logic-high state is held until the end of tCYCH,B, allowing time to ensure the transmission was stopped correctly. The timing for data and break communication is shown in Section 6.13.

HDQ serial communication is normally initiated by the host processor sending a break command to the device. A break is detected when the DATA pin is driven to a logic-low state for a time tB or greater. The DATA pin should then be returned to its normal ready high logic state for a time tBR. The device is now ready to receive information from the host processor.

The device is shipped in the I2C mode. TI provides tools can be used to switch from I2C to HDQ communications.