SLUSC67B March   2016  – October 2017

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: Supply Current
    6. 6.6  Electrical Characteristics: Power Supply Control
    7. 6.7  Electrical Characteristics: AFE Power-On Reset
    8. 6.8  Electrical Characteristics: AFE Watchdog Reset and Wake Timer
    9. 6.9  Electrical Characteristics: Current Wake Comparator
    10. 6.10 Electrical Characteristics: VC1, VC2, VC3, VC4, BAT, PACK
    11. 6.11 Electrical Characteristics: SMBD, SMBC
    12. 6.12 Electrical Characteristics: PRES, BTP_INT, DISP
    13. 6.13 Electrical Characteristics: LEDCNTLA, LEDCNTLB, LEDCNTLC
    14. 6.14 Electrical Characteristics: Coulomb Counter
    15. 6.15 Electrical Characteristics: CC Digital Filter
    16. 6.16 Electrical Characteristics: ADC
    17. 6.17 Electrical Characteristics: ADC Digital Filter
    18. 6.18 Electrical Characteristics: CHG, DSG FET Drive
    19. 6.19 Electrical Characteristics: PCHG FET Drive
    20. 6.20 Electrical Characteristics: FUSE Drive
    21. 6.21 Electrical Characteristics: Internal Temperature Sensor
    22. 6.22 Electrical Characteristics: TS1, TS2, TS3, TS4
    23. 6.23 Electrical Characteristics: PTC, PTCEN
    24. 6.24 Electrical Characteristics: Internal 1.8-V LDO
    25. 6.25 Electrical Characteristics: High-Frequency Oscillator
    26. 6.26 Electrical Characteristics: Low-Frequency Oscillator
    27. 6.27 Electrical Characteristics: Voltage Reference 1
    28. 6.28 Electrical Characteristics: Voltage Reference 2
    29. 6.29 Electrical Characteristics: Instruction Flash
    30. 6.30 Electrical Characteristics: Data Flash
    31. 6.31 Electrical Characteristics: OCD, SCC, SCD1, SCD2 Current Protection Thresholds
    32. 6.32 Timing Requirements: OCD, SCC, SCD1, SCD2 Current Protection Timing
    33. 6.33 Timing Requirements: SMBus
    34. 6.34 Timing Requirements: SMBus XL
    35. 6.35 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Primary (1st Level) Safety Features
      2. 7.3.2  Secondary (2nd Level) Safety Features
      3. 7.3.3  Charge Control Features
      4. 7.3.4  Gas Gauging
      5. 7.3.5  Configuration
        1. 7.3.5.1 Oscillator Function
        2. 7.3.5.2 System Present Operation
        3. 7.3.5.3 Emergency Shutdown
        4. 7.3.5.4 1-Series, 2-Series, 3-Series, or 4-Series Cell Configuration
        5. 7.3.5.5 Cell Balancing
      6. 7.3.6  Battery Parameter Measurements
        1. 7.3.6.1 Charge and Discharge Counting
      7. 7.3.7  Battery Trip Point (BTP)
      8. 7.3.8  Lifetime Data Logging Features
      9. 7.3.9  Authentication
      10. 7.3.10 LED Display
      11. 7.3.11 Voltage
      12. 7.3.12 Current
      13. 7.3.13 Temperature
      14. 7.3.14 Communications
        1. 7.3.14.1 SMBus On and Off State
        2. 7.3.14.2 SBS Commands
    4. 7.4 Device Functional Modes
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 High-Current Path
          1. 8.2.2.1.1 Protection FETs
          2. 8.2.2.1.2 Chemical Fuse
          3. 8.2.2.1.3 Lithium-Ion Cell Connections
          4. 8.2.2.1.4 Sense Resistor
          5. 8.2.2.1.5 ESD Mitigation
        2. 8.2.2.2 Gas Gauge Circuit
          1. 8.2.2.2.1 Coulomb-Counting Interface
          2. 8.2.2.2.2 Power Supply Decoupling and PBI
          3. 8.2.2.2.3 System Present
          4. 8.2.2.2.4 SMBus Communication
          5. 8.2.2.2.5 FUSE Circuitry
        3. 8.2.2.3 Secondary-Current Protection
          1. 8.2.2.3.1 Cell and Battery Inputs
          2. 8.2.2.3.2 External Cell Balancing
          3. 8.2.2.3.3 PACK and FET Control
          4. 8.2.2.3.4 Temperature Output
          5. 8.2.2.3.5 LEDs
          6. 8.2.2.3.6 Safety PTC Thermistor
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Protector FET Bypass and Pack Terminal Bypass Capacitors
      2. 10.1.2 ESD Spark Gap
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

A battery fuel gauge circuit board is a challenging environment due to the fundamental incompatibility of high-current traces and ultra-low current semiconductor devices. The best way to protect against unwanted trace-to-trace coupling is with a component placement, such as that shown in Figure 43, where the high-current section is on the opposite side of the board from the electronic devices. Clearly, this is not possible in many situations due to mechanical constraints. Still, every attempt should be made to route high-current traces away from signal traces, which enter the bq4050 gauge directly. IC references and registers can be disturbed and in rare cases damaged due to magnetic and capacitive coupling from the high-current path.

NOTE

During surge current and ESD events, the high-current traces appear inductive and can couple unwanted noise into sensitive nodes of the gas gauge electronics, as illustrated in Figure 44.
bq4050 BatCircuits.gif Figure 43. Separating High- and Low-Current Sections Provides an Advantage in Noise Immunity
bq4050 Signal_Lines.gif Figure 44. Avoid Close Spacing Between High-Current and Low-Level Signal Lines

Kelvin voltage sensing is important to accurately measure current and top and bottom cell voltages. Place all filter components as close as possible to the device. Route the traces from the sense resistor in parallel to the filter circuit. Adding a ground plane around the filter network can add additional noise immunity. Figure 45 and Figure 46 demonstrate correct kelvin current sensing.

bq4050 sens_res.gif Figure 45. Sensing Resistor PCB Layout
bq4050 FilterCircuit.gif Figure 46. Sense Resistor, Ground Shield, and Filter Circuit Layout

10.1.1 Protector FET Bypass and Pack Terminal Bypass Capacitors

Use wide copper traces to lower the inductance of the bypass capacitor circuit. In Figure 47, an example layout demonstrates this technique.

bq4050 CopperTraces.gif Figure 47. Use Wide Copper Traces to Lower the Inductance of Bypass Capacitors C1, C2, and C3

10.1.2 ESD Spark Gap

Protect the SMBus clock, data, and other communication lines from ESD with a spark gap at the connector. The pattern in Figure 48 is recommended, with 0.2-mm spacing between the points.

bq4050 ESDSparkGap.gif Figure 48. Recommended Spark-Gap Pattern Helps Protect Communication Lines from ESD

10.2 Layout Example

bq4050 Top_layer.gif Figure 49. Top Layer
bq4050 dev_internal_layer_1_SLUUAV7.gif Figure 50. Internal Layer 1
bq4050 dev_internal_layer_2_SLUUAV7.gif Figure 51. Internal Layer 2
bq4050 Bottom_layer.gif Figure 52. Bottom Layer