SLUSCS4C
June 2017 – April 2021
BQ40Z50-R2
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Description (continued)
6
Pin Configuration and Functions
6.1
Pin Equivalent Diagrams
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Supply Current
7.6
Power Supply Control
7.7
AFE Power-On Reset
7.8
AFE Watchdog Reset and Wake Timer
7.9
Current Wake Comparator
7.10
VC1, VC2, VC3, VC4, BAT, PACK
7.11
SMBD, SMBC
7.12
PRES, BTP_INT, DISP
7.13
LEDCNTLA, LEDCNTLB, LEDCNTLC
7.14
Coulomb Counter
7.15
CC Digital Filter
7.16
ADC
7.17
ADC Digital Filter
7.18
CHG, DSG FET Drive
7.19
PCHG FET Drive
7.20
FUSE Drive
7.21
Internal Temperature Sensor
7.22
TS1, TS2, TS3, TS4
7.23
PTC, PTCEN
7.24
Internal 1.8-V LDO
7.25
High-Frequency Oscillator
7.26
Low-Frequency Oscillator
7.27
Voltage Reference 1
7.28
Voltage Reference 2
7.29
Instruction Flash
7.30
Data Flash
7.31
OLD, SCC, SCD1, SCD2 Current Protection Thresholds
7.32
Timing Requirements: OLD, SCC, SCD1, SCD2 Current Protection Timing
7.33
Timing Requirements: SMBus
7.34
Timing Requirements: SMBus XL
7.35
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Primary (1st Level) Safety Features
8.3.2
Secondary (2nd Level) Safety Features
8.3.3
Charge Control Features
8.3.4
Gas Gauging
8.3.5
Configuration
8.3.5.1
Oscillator Function
8.3.5.2
System Present Operation
8.3.5.3
Emergency Shutdown
8.3.5.4
1-Series, 2-Series, 3-Series, or 4-Series Cell Configuration
8.3.5.5
Cell Balancing
8.3.6
Battery Parameter Measurements
8.3.6.1
Charge and Discharge Counting
8.3.7
Battery Trip Point (BTP)
8.3.8
Lifetime Data Logging Features
8.3.9
Authentication
8.3.10
LED Display
8.3.11
IATA Support
8.3.12
Voltage
8.3.13
Current
8.3.14
Temperature
8.3.15
Communications
8.3.15.1
SMBus On and Off State
8.3.15.2
SBS Commands
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
High-Current Path
9.2.2.1.1
Protection FETs
9.2.2.1.2
Chemical Fuse
9.2.2.1.3
Li-Ion Cell Connections
9.2.2.1.4
Sense Resistor
9.2.2.1.5
ESD Mitigation
9.2.2.2
Gas Gauge Circuit
9.2.2.2.1
Coulomb-Counting Interface
9.2.2.2.2
Power Supply Decoupling and PBI
9.2.2.2.3
System Present
9.2.2.2.4
SMBus Communication
9.2.2.2.5
FUSE Circuitry
9.2.2.3
Secondary-Current Protection
9.2.2.3.1
Cell and Battery Inputs
9.2.2.3.2
External Cell Balancing
9.2.2.3.3
PACK and FET Control
9.2.2.3.4
Temperature Output
9.2.2.3.5
LEDs
9.2.2.3.6
Safety PTC Thermistor
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.1.1
Protector FET Bypass and Pack Terminal Bypass Capacitors
11.1.2
ESD Spark Gap
11.2
Layout Example
12
Device and Documentation Support
12.1
Third-Party Products Disclaimer
12.2
Documentation Support
12.2.1
Related Documentation
12.2.2
Receiving Notification of Documentation Updates
12.3
Support Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RSM|32
MPQF195B
Thermal pad, mechanical data (Package|Pins)
RSM|32
QFND239E
Orderable Information
sluscs4c_oa
sluscs4c_pm
12.2
Documentation Support