8.3.1 Safety Features

The bq40z60 provides support for primary safety, including:

• Cell Over/Undervoltage Protection
• Charge and Discharge Overcurrent
• Short Circuit Protection
• Charge and Discharge Overtemperature

The secondary safety features of the bq40z60 can be used to indicate more serious faults via the FUSE pin. This pin can be used to blow an in-line fuse to permanently disable the battery pack from charging or discharging. The secondary safety features provide protection against:

• Safety Over/Undervoltage Permanent Failure
• Safety Overtemperature Permanent Failure
• Safety FET Overtemperature Permanent Failure
• Qmax Imbalance Permanent Failure
• Impedance Imbalance Permanent Failure
• Capacity Degradation Permanent Failure
• Cell Balancing Permanent Failure
• Fuse Failure Permanent Failure
• Voltage Imbalance at Rest Permanent Failure
• Voltage Imbalance Active Permanent Failure
• Charge/Discharge FET Permanent Failure
• Second Level Protector Permanent Failure
• Instruction Flash Checksum Permanent Failure
• Open Cell Connection Permanent Failure
• Data Flash Permanent Failure
• Open Thermistor Permanent Failure

8.3.2 Analog Front End (AFE) Details

The analog front end (AFE) consists of circuits responsible for managing internal power and interfacing to outside components for measuring current, voltage, and temperature. The bq40z60 AFE includes an active-high interrupt output connected internally to the fuel gauge to notify it of important changes in some of the AFE registers.

The bq40z60 manages its supply voltage dynamically according to operating conditions. When V_BAT > V_{SWITCHOVER–} + V_HYS, the AFE connects an internal switch to BAT and uses this pin to supply power to its internal 1.8-V LDO, which subsequently powers all device logic and flash operations. Once BAT decreases to V_BAT < V_{SWITCHOVER–}, the AFE disconnects its internal switch from BAT and connects another switch to VCC, allowing sourcing of power from a charger (if present). An external capacitor connected to PBI provides a momentary supply voltage to help guard against system brownouts due to transient short-circuit or overload events that pull VBAT below V_{SWITCHOVER–}.

Figure 2. Internal Power Source Selection

In the event of a power-cycle, the bq40z60 AFE will hold its internal RESET output pin high for t_RST duration to allow its internal 1.8-V LDO and LFO to stabilize before running the analog gas gauge (AGG). The AFE enters power-on reset when the voltage at V_REG falls below V_REGIT–, and exits reset when V_REG rises above V_REGIT– + V_HYS for t_RST time. After t_RST, the bq40z60 AGG writes its trim values to the AFE.

Figure 3. Power-On Reset Operation

The bq40z60 AFE includes a low frequency oscillator (LFO) running at 262.144 kHz. The AFE monitors the LFO frequency and indicates a failure via LATCH_STATUS[LFO] if the output frequency is much lower than normal.

The bq40z60 AFE provides two internal voltage references: V_REF1, used by the ADC and CC, and V_REF2 used by the LDO, LFO, current wake comparator, and over- and short-current protection circuitry.

8.3.2.2 Cell Balancing Support

The integrated cell balancing FETs included in the bq40z60 device allow the AFE to bypass cell current around a given cell or numerous cells to effectively balance the entire battery stack. External series resistors placed between the cell connections and the VCx input pins set the balancing current magnitude. The cell balancing circuitry can be enabled or disabled via the CELL_BAL_DET[CB3, CB2, CB1] control register. Series input resistors between 100 Ω and 1 kΩ are recommended for effective cell balancing.

Figure 4. Cell Balancing Configuration

8.3.3 Charge Controller Details

The charge controller, under control from the fuel gauge's processor, provides autonomous control over the charging of the battery pack. The controller uses a 1-MHz buck architecture using external FETs driven by internal gate drivers. The charge voltage and current can be adjusted via data flash values to account for the temperature and voltage of the battery cells, allowing for a JEITA type charge profile. The voltage and current may also be directly written to the charge controller from an external host, allowing for a user-defined charging profile. The charger runs in Narrow Voltage DC, that is, the output voltage of the charger will only exceed the battery voltage by a small amount; by contrast, a charger that does not run in Narrow Voltage DC mode will output the adapter voltage to the system.

The charger is designed to enable the system to continue to run while the battery is charged. If the system requires more current than the charger is able to provide, the battery supplements the current to the system. The charger can support an external precharge FET, allowing the VSYS to remain above a minimum voltage needed for the system to operate.

The charger supports precharge, constant current/constant voltage, and termination, as shown below. The voltage and current thresholds for precharge and termination are controlled by data flash values. Refer to the bq40z60 Technical Reference Manual (SLUUA04) for more information.

Figure 5. Normal Charge Profile

The charger maintains a cycle-by-cycle current limit by sensing across a resistor in series with the inductor (shown in Figure 6 as R_CHG). In precharge and constant voltage, the DC current is regulated by sensing the current across the sense resistor at the bottom on of the cell stack. When the charger is enabled, the initial current is set for either the Precharge or Constant Current/Constant Voltage (CC/CV) value, based on the minimum cell voltage. Once the charger enters CONSTANT CURRENT mode, the temperature and maximum cell voltage-adjusted–charging current is set, and the voltage output of the charger is automatically regulated to maintain the current across RCHG. Once the temperature-adjusted voltage is reached by the charger output, the current starts to taper.

Throughout the charge cycle, the current available from the charger is limited by the ChargingCurrent() value. The system draws more current, however, with the battery supplementing the difference. Once battery charging is terminated, the charger is capable of supplying all of the current defined by the Advanced Charge Algorithm:Maximum Current Register value. Refer to the bq40z60 Technical Reference Manual (SLUUA04) for more information.

Figure 6 shows the system power path with the adaptor current and battery current overlaid. Further information is available in Application and Implementation.

Figure 6. Power Path Overview

8.3.4 Fuel Gauge and Control Details

The bq40z60 uses the Impedance Track™ algorithm to measure and calculate the available capacity in battery cells. The bq40z60 accumulates a measure of charge and discharge currents and compensates the charge current measurement for the temperature and state-of-charge of the battery. The bq40z60 estimates self-discharge of the battery and also adjusts the self-discharge estimation based on temperature. The device also has TURBO BOOST mode support, which enables the bq40z60 to provide the necessary data for the MCU to determine what level of peak power consumption can be applied without causing a system reset or a transient battery voltage level spike to trigger termination flags. See the bq40z60 Technical Reference Manual (SLUUA04) for further details.

8.3.5 Authentication

The bq40z60 supports authentication by the host using SHA-1. More information about the algorithm can be found in the bq40z60 Technical Reference Manual (SLUUA04).

8.3.6 LED Display

The bq40z60 can drive a 4-segment LED display for remaining capacity indication and/or a permanent fail (PF) error code indication.

8.3.7 Internal Temperature Sensor

An internal temperature sensor is available on the bq40z60 to reduce the cost, power, and size of the external components necessary to measure temperature. It is available for connection to the ADC using the multiplexer, and is ideal for determining pack temperature during storage and IC temperature during normal operation.

8.3.8 External Temperature Sensor Support

Each of the TSx input pins can be enabled with an 18-kΩ (Typ.) linearization pullup resistor to support using a 10 kΩ (25°C) NTC external thermistor, such as the Semitec 103AT–2. One or more thermistors can be connected between VSS and the individual RCx pin. The analog measurement is then taken via the ADC through its input multiplexer. If a different thermistor type is required, then changes to the external support components may be required.

Figure 7. Thermistor Pin Configuration

8.3.9 High Frequency Oscillator

The bq40z60 includes a high frequency oscillator (HFO) running at 16.78 MHz. It is synthesized from the LFO output and scaled down to 8.388 MHz with 50% duty cycle. There is no need for external oscillator components.

8.3.10 Communications

The bq40z60 uses SMBus v1.1 with MASTER mode and packet error checking (PEC) options per the SBS specification.