SLUSB96A November 2012 – December 2015
Careful PCB layout practice is critical to proper system operation. There are many references on proper PCB layout techniques. A few good tips are repeated here:
The TX layout requires a 4-layer PCB layout for best ground plane technique. A 2-layer PCB layout can be achieved though not as easily. Ideally, the approach to the layer stack-up has been:
Thus, the circuitry is virtually sandwiched between grounds. This minimizes EMI noise emissions and also provides a noise-free voltage reference plane for device operation.
Keep as much copper as possible. Make sure the bq500410A GND pins and the power pad have a continuous flood connection to the ground plane. The power pad should also be stitched to the ground plane, which also acts as a heat sink for the bq500410A. A good GND reference is necessary for proper bq500410A operation, such as analog-digital conversion, clock stability and best overall EMI performance.
Separate the analog ground plane from the power ground plane and use only ONE tie point to connect grounds. Having several tie points defeats the purpose of separating the grounds.
The COMM return signal from the resonant tank should be routed as a differential pair. This is intended to reduce stray noise induction. The frequencies of concern warrant low-noise analog signaling techniques, such as differential routing and shielding, but the COMM signal lines do not need to be impedance matched.
The DC-DC buck regulator used from the 12-V input supplies the bq500410A with 3.3 V. Typically a single-chip controller solution with integrated power FET and synchronous rectifier or outboard diode is used. Pull in the buck inductor and power loop as close as possible to create a tight loop. Likewise, the power-train, full-bridge components should be pulled together as tight as possible. See the bq500410A EVM for an example of a good layout technique.