The bq51010B is a family of advanced, flexible, secondary-side devices for wireless power transfer in portable applications. The bq51010B devices provide the AC-DC power conversion and regulation while integrating the digital control required to comply with the Qi v1.1 communication protocol. Together with the bq50xxx primary-side controller, the bq51010B enables a complete contact-less power transfer system for a wireless power supply solution. Global feedback is established from the secondary to the primary to control the power transfer process using the Qi v1.1 protocol.
The bq51010B devices integrate a low resistance synchronous rectifier, low-dropout regulator, digital control, and accurate voltage and current loops to ensure high efficiency and low power dissipation.
The bq51010B also includes a digital controller that can calculate the amount of power received by the mobile device within the limits set by the WPC v1.1 standard. The controller will then communicate this information to the transmitter to allow the transmitter to determine if a foreign object is present within the magnetic interface and introduces a higher level of safety within magnetic field. This Foreign Object Detection (FOD) method is part of the requirements under the WPC v1.1 specification.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
bq51010B | DSBGA (28) | 1.90 mm × 3.00 mm |
Changes from * Revision (December 2012) to A Revision
DEVICE | FUNCTION | VOUT (VBAT-REG) | PROTOCOL | MAXIMUM POUT | I2C |
---|---|---|---|---|---|
bq51003 | Wireless receiver | 5 V | Qi v1.1 | 2.5 W | No |
bq51013B | Wireless receiver | 5 V | Qi v1.1 | 5 W | No |
bq51010B | Wireless receiver | 7 V | Qi v1.1 | 5 W | No |
bq51020 | Wireless receiver | 4.5 to 8 V | Qi v1.1 | 5 W | No |
bq51021 | Wireless receiver | 4.5 to 8 V | Qi v1.1 | 5 W | Yes |
bq51221 | Dual mode wireless receiver | 4.5 to 8 V | Qi v1.1, PMA | 5 W | Yes |
bq51025 | Wireless receiver | 4.5 to 10 V | Qi v1.1 (in 5 W mode) | 10 W | Yes |
bq51020B | Wireless receiver and direct charger | 4.2 V | Qi v1.1 | 5 W | No |
bq51051B | Wireless receiver and direct charger | 4.35 V | Qi v1.1 | 5 W | No |
bq51052B | Wireless receiver and direct charger | 4.4 V | Qi v1.1 | 5 W | No |
DEVICE | FUNCTION | WPC VERSION | VRECT-OVP | VOUT-(REG) | OVER CURRENT SHUTDOWN | AD-OVP | TERMINATION | COMMUNICATION CURRENT LIMIT(1)(2) |
---|---|---|---|---|---|---|---|---|
bq51010B | 7-V power supply | v1.1 | 15 V | 7 V | Disabled | Disabled | Disabled | Adaptive + 1s Hold-Off |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
AC1 | B3, B4 | I | AC input from receiver coil antenna. |
AC2 | B1, B2 | I | |
AD | G4 | I | Connect this pin to the wired adapter input. When a voltage is applied to this pin wireless charging is disabled and AD_EN is driven low. Connect to GND through a 1-µF capacitor. If unused, capacitor is not required and must be grounded directly. |
AD-EN | F3 | O | Push-pull driver for external PFET connecting AD and OUT. This node is pulled to the higher of OUT and AD when turning off the external FET. This voltage tracks approximately 4 V below AD when voltage is present at AD and provides a regulated VSG bias for the external FET. Float this pin if unused. |
BOOT1 | C4 | O | Bootstrap capacitors for driving the high-side FETs of the synchronous rectifier. Connect a 10-nF ceramic capacitor from BOOT1 to AC1 and from BOOT2 to AC2. |
BOOT2 | C1 | O | |
CLMP1 | E3 | O | Open drain FETs are used for a non-power dissipative overvoltage AC clamp protection. When the RECT voltage goes above 15 V, both switches is turned on and the capacitors acts as a low impedance to protect the IC from damage. If used, Clamp1 is required to be connected to AC1, and Clamp2 is required to be connected to AC2 through 0.47-µF capacitors. |
CLMP2 | E2 | O | |
COM1 | E4 | O | Open-drain output used to communicate with primary by varying reflected impedance. Connect through a capacitor to either AC1 or AC2 for capacitive load modulation (COM2 must be connected to the alternate AC1 or AC2 pin). For resistive modulation connect COM1 and COM2 to RECT through a single resistor; connect through separate capacitors for capacitive load modulation. |
COM2 | E1 | O | |
EN1 | G3 | I | Inputs that allow user to enable or disable wireless and wired charging <EN1 EN2>: <00> wireless charging is enabled unless AD voltage > 3.6 V <01> Dynamic communication current limit disabled <10> AD-EN pulled low, wireless charging disabled <11> wired and wireless charging disabled. |
EN2 | G2 | I | |
FOD | F2 | I | Input for the received power measurement. Connect to GND with a 140-Ω resistor. See the FOD section for more detail. |
ILIM | G1 | I/O | Programming pin for the over current limit. Connect external resistor to VSS. Size RILIM with the following equation: RILIM = 314 / IMAX where IMAX is the expected maximum output current of the wireless power supply. The hardware current limit (IILIM) is 20% greater than IMAX or 1.2 x 1MAX. If the supply is meant to operate in current limit use: RILIM = 314 / IILIM, RILIM = R1 + RFOD |
OUT | D1, D2, D3, D4 |
O | Output pin, delivers power to the load. |
PGND | A1, A2, A3, A4 |
— | Power ground |
RECT | C2, C3 | O | Filter capacitor for the internal synchronous rectifier. Connect a ceramic capacitor to PGND. Depending on the power levels, the value may be 4.7 μF to 22 μF. |
TS/CTRL | F1 | I | Must be connected to ground through a resistor. If an NTC function is not desired connect to GND with a 10-kΩ resistor. As a CTRL pin pull to ground to send end power transfer (EPT) fault to the transmitter or pull-up to an internal rail (that is, 1.8 V) to send EPT termination to the transmitter. Note that a 3-state driver must be used to interface this pin (see the 3-State Driver Recommendations For the TS-CTRL Pin section for further description) |
WPG | F4 | O | Open-drain output – Active when the output of the wireless power supply is enabled. |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Input voltage | AC1, AC2 | –0.8 | 20 | V |
RECT, COM1, COM2, OUT, WPG, CLAMP1, CLAMP2 | –0.3 | 20 | ||
AD, AD-EN | –0.3 | 30 | ||
BOOT1, BOOT2 | –0.3 | 26 | ||
EN1, EN2, TERM, FOD, TS-CTRL, ILIM | –0.3 | 7 | ||
Input current | AC1, AC2 | 1.5 | A(RMS) | |
Output current | OUT | 750 | mA | |
Output sink current | WPG | 15 | mA | |
COM1, COM2 | 1 | A | ||
Junction temperature, TJ | –40 | 150 | °C | |
Storage temperature, Tstg | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) | ±2000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) | ±500 |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
VRECT | Voltage range | RECT | 4 | 10 | V |
IRECT | Current through internal rectifier | RECT | 1 | A | |
IOUT | Output current | OUT | 750 | mA | |
IAD-EN | Sink current | AD-EN | 1 | mA | |
ICOMM | COMM sink current | COMM | 400 | mA | |
TJ | Junction temperature | 0 | 125 | °C |
THERMAL METRIC (1) | bq51010B | UNIT | |
---|---|---|---|
YFP (DSBGA) | |||
28 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 58.9 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 0.2 | °C/W |
RθJB | Junction-to-board thermal resistance | 9.1 | °C/W |
ψJT | Junction-to-top characterization parameter | 1.4 | °C/W |
ψJB | Junction-to-board characterization parameter | 8.9 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | — | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
UVLO | Undervoltage lockout | VRECT = 0 V to 3 V | 2.6 | 2.7 | 2.8 | V | |
VHYS | Hysteresis on UVLO | VRECT = 3 V to 2 V | 250 | mV | |||
Hysteresis on OVP | VRECT = 16 V to 5 V | 150 | |||||
VRECT | Input overvoltage threshold | VRECT = 5 V to 16 V | 14.5 | 15 | 15.5 | V | |
VRECT-REG | Dynamic VRECT threshold 1 | ILOAD < 0.1 × IIMAX (ILOAD rising) | 9.08 | V | |||
Dynamic VRECT threshold 2 | 0.1 × IIMAX < ILOAD < 0.2 × IIMAX
(ILOAD rising) |
8.28 | |||||
Dynamic VRECT threshold 3 | 0.2 × IIMAX < ILOAD < 0.4 × IIMAX
(ILOAD rising) |
7.53 | |||||
Dynamic VRECT threshold 4 | ILOAD > 0.4 × IIMAX (ILOAD rising) | 7.11 | |||||
VRECT tracking | In current limit voltage above VOUT | VO + 0.25 | |||||
ILOAD | ILOAD hysteresis for dynamic VRECT thresholds as a percentage of IILIM | ILOAD falling | 4% | ||||
VRECT-DPM | Rectifier undervoltage protection, restricts IOUT at VRECT-DPM | 3 | 3.1 | 3.2 | V | ||
VRECT-REV | Rectifier reverse voltage protection at the output | VRECT-REV = VOUT – VRECT, VOUT = 10 V |
8 | 9 | V | ||
QUIESCENT CURRENT | |||||||
IRECT | Active chip quiescent current consumption from RECT | ILOAD = 0 mA, 0°C ≤ TJ ≤ 85°C | 8 | 10 | mA | ||
ILOAD = 300 mA, 0°C ≤ TJ ≤ 85°C |
2 | 3 | |||||
IOUT | Quiescent current at the output when wireless power is disabled (standby) | VOUT = 7 V, 0°C ≤ TJ ≤ 85°C | 28 | 40 | µA | ||
ILIM SHORT CIRCUIT | |||||||
RILIM | Highest value of ILIM resistor considered a fault (short). Monitored for IOUT > 100 mA | RILIM = 200 Ω to 50 Ω. IOUT latches off, cycle power to reset | 120 | Ω | |||
tDGL | Deglitch time transition from ILIM short to IOUT disable | 1 | ms | ||||
ILIM_SC | ILIM-SHORT,OK enables the ILIM short comparator when IOUT is greater than this value | ILOAD = 0 mA to 200 mA | 110 | 145 | 165 | mA | |
Hysteresis for ILIM-SHORT,OK comparator | ILOAD = 0 mA to 200 mA | 30 | |||||
IOUT | Maximum output current limit, CL | Maximum ILOAD that is delivered for 1 ms when ILIM is shorted | 2.45 | A | |||
OUTPUT | |||||||
VOUT-REG | Regulated output voltage | ILOAD = 750 mA | 6.9 | 6.96 | 7.02 | V | |
ILOAD = 10 mA | 6.9 | 6.95 | 7.05 | ||||
KILIM | Current programming factor for hardware protection | RLIM = KILIM / IILIM, where IILIM is the hardware current limit. IOUT = 750 mA |
303 | 314 | 322 | AΩ | |
KIMAX | Current programming factor for the nominal operating current | IIMAX = KIMAX / RLIM, where IMAX is the maximum normal operating current. IOUT = 750 mA | 262 | AΩ | |||
IOUT | Current limit programming range | 1.5 | A | ||||
ICOMM | Current limit during WPC communication | IOUT > 300 mA | IOUT + 50 | mA | |||
IOUT < 300 mA | 343 | 378 | 425 | ||||
tHOLD | Hold off time for the communication current limit during start-up | 1 | s | ||||
TS / CTRL | |||||||
VTS | Internal TS bias voltage | ITS-Bias < 100 µA (periodically driven see tTS-CTRL) | 2 | 2.2 | 2.4 | V | |
VCOLD | Rising threshold | VTS = 50% to 60% | 56.5% | 58.7% | 60.8% | VTS-Bias | |
Falling hysteresis | VTS = 60% to 50% | 2% | |||||
VHOT | Falling threshold | VTS = 20% to 15% | 18.5% | 19.6% | 20.7% | VTS-Bias | |
Rising hysteresis | VTS = 15% to 20% | 3% | |||||
VCTRL | CTRL pin threshold for a high | VTS/CTRL = 50 mV to 150 mV | 80 | 100 | 130 | mV | |
CTRL pin threshold for a low | VTS/CTRL = 150 mV to 50 mV | 50 | 80 | 100 | |||
tTS-CTRL | Time VTS-Bias is active when TS measurements occur | Synchronous to the communication period | 24 | ms | |||
tTS | Deglitch time for all TS comparators | 10 | ms | ||||
RTS | Pullup resistor for the NTC network. Pulled up to the voltage bias | 18 | 20 | 22 | kΩ | ||
THERMAL PROTECTION | |||||||
TJ | Thermal shutdown temperature | 155 | °C | ||||
Thermal shutdown hysteresis | 20 | ||||||
OUTPUT LOGIC LEVELS ON WPG | |||||||
VOL | Open drain WPG pin | ISINK = 5 mA | 500 | mV | |||
IOFF | WPG leakage current when disabled | V WPG = 20 V | 1 | µA | |||
COMM PIN | |||||||
RDS(ON) | COM1 and COM2 | VRECT = 2.6 V | 1.5 | Ω | |||
fCOMM | Signaling frequency on COMM pin | 2 | Kb/s | ||||
IOFF | Comm pin leakage current | VCOM1 = 20 V, VCOM2 = 20 V | 1 | µA | |||
CLAMP PIN | |||||||
RDS(ON) | Clamp1 and Clamp2 | 0.8 | Ω | ||||
ADAPTER ENABLE | |||||||
V AD-EN | VAD rising threshold voltage. EN-UVLO | VAD = 0 V to 5 V | 3.5 | 3.6 | 3.8 | V | |
V AD-EN hysteresis, EN-HYS | VAD = 5 V to 0 V | 400 | mV | ||||
IAD | Input leakage current | VRECT = 0 V, VAD = 5 V | 60 | μA | |||
RAD | Pullup resistance from AD-EN to OUT when adapter mode is disabled and VOUT > VAD, EN-OUT | VAD = 0 V, VOUT = 5 V | 200 | 350 | Ω | ||
VAD | Voltage difference between VAD and V AD-EN when adapter mode is enabled, EN-ON | VAD = 5 V, 0°C ≤ TJ ≤ 85°C | 3 | 4.5 | 5 | V | |
SYNCHRONOUS RECTIFIER | |||||||
IOUT | IOUT at which the synchronous rectifier enters half-synchronous mode, SYNC_EN | ILOAD = 200 mA to 0 mA | 80 | 100 | 130 | mA | |
Hysteresis for IOUT,RECT-EN (full-synchronous mode enabled) | ILOAD = 0 mA to 200 mA | 25 | |||||
VHS-DIODE | High-side diode drop when the rectifier is in half-synchronous mode | IAC-VRECT = 250 mA and TJ = 25°C |
0.7 | V | |||
EN1 AND EN2 | |||||||
VIL | Input low threshold for EN1 and EN2 | 0.4 | V | ||||
VIH | Input high threshold for EN1 and EN2 | 1.3 | V | ||||
RPD | EN1 and EN2 pull down resistance | 200 | kΩ | ||||
ADC (WPC RELATED MEASUREMENTS AND COEFFICIENTS) | |||||||
IOUT SENSE | Accuracy of the current sense over the load range | IOUT = 0 mA to 750 mA | –1.5% | 0% | 0.9% |