SLUSEE3 July   2021 BQ51013B-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Details of a Qi Wireless Power System and BQ51013B-Q1 Power Transfer Flow Diagrams
      2. 9.3.2  Dynamic Rectifier Control
      3. 9.3.3  Dynamic Efficiency Scaling
      4. 9.3.4  RILIM Calculations
      5. 9.3.5  Input Overvoltage
      6. 9.3.6  Adapter Enable Functionality and EN1/EN2 Control
      7. 9.3.7  End Power Transfer Packet (WPC Header 0x02)
      8. 9.3.8  Status Outputs
      9. 9.3.9  WPC Communication Scheme
      10. 9.3.10 Communication Modulator
      11. 9.3.11 Adaptive Communication Limit
      12. 9.3.12 Synchronous Rectification
      13. 9.3.13 Temperature Sense Resistor Network (TS)
      14. 9.3.14 3-State Driver Recommendations for the TS/CTRL Pin
      15. 9.3.15 Thermal Protection
      16. 9.3.16 WPC v1.2 Compliance – Foreign Object Detection
      17. 9.3.17 Receiver Coil Load-Line Analysis
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 BQ51013B-Q1 Wireless Power Receiver Used as a Power Supply
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Using The BQ51013B-Q1 as a Wireless Power Supply: (See Figure 1-1 )
          2. 10.2.1.2.2 Series and Parallel Resonant Capacitor Selection
          3. 10.2.1.2.3 Recommended RX Coils
          4. 10.2.1.2.4 COMM, CLAMP, and BOOT Capacitors
          5. 10.2.1.2.5 Control Pins and CHG
          6. 10.2.1.2.6 Current Limit and FOD
          7. 10.2.1.2.7 RECT and OUT Capacitance
        3. 10.2.1.3 Application Curves
      2. 10.2.2 Dual Power Path: Wireless Power and DC Input
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
        3. 10.2.2.3 Application Curves
      3. 10.2.3 Wireless and Direct Charging of a Li-Ion Battery at 800 mA
        1. 10.2.3.1 Design Requirements
        2. 10.2.3.2 Detailed Design Procedure
        3. 10.2.3.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
      2. 13.1.2 Development Support
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Support Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.6 Typical Characteristics

GUID-7D95E590-1A2D-440F-8353-D44924B0DC23-low.gif
Input: RX AC power Output: RX RECT power
Efficiency: Output Power / Input Power
Figure 8-1 Rectifier Efficiency
GUID-4915E300-2B49-4D7D-B422-986A857ABB71-low.gif
Input: TX DC power Output: RX RECT power
Plot: Output Power / Input Power
Figure 8-3 Light Load System Efficiency Improvement Due to Dynamic Efficiency Scaling Feature (1)
GUID-E3A0FD77-C502-449F-8886-3780B1CB5A48-low.gif
RILIM = 250 Ω and 750 Ω
Figure 8-5 Impact of Maximum Current setting (RILIM) on Rectifier Voltage (VRECT)
GUID-C6F22025-A33C-4CEB-A810-D39A5FDE4590-low.gif
COUT = 1 µf Without Communication
Figure 8-7 Impact of Load Current on Output Ripple
GUID-88793B5E-D26C-452E-94F3-72A064E7AA56-low.gifFigure 8-9 1-A Instantaneous Load Dump (2)
GUID-BE2F8687-E811-4CA6-87AA-5D48A82FAB37-low.pngFigure 8-11 1-A Load Dump Full System Response
GUID-BEA02B23-783B-4162-9522-DF22D7C312A9-low.gifFigure 8-13 TS Fault
GUID-1FD4E8BE-FD53-4054-B2CB-E561EBE55BB5-low.gifFigure 8-15 Adapter Insertion (VAD = 10 V) Illustrating Break-Before-Make Operation
GUID-34670BF3-D8A8-4682-B3BA-D5851A55ADD0-low.gifFigure 8-17 BQ51013B-Q1 Typical Start-Up With a 1-A System Load
GUID-D21855F0-4DAD-400C-A4FE-2249FCDB0245-low.gifFigure 8-19 Adaptive Communication Limit Event Where the Current Limit is IOUT + 50 mA (IOUT-DC > 300 mA)
GUID-EBBBD5AF-7C6F-40B2-9A3C-F2A12E92A4D3-low.gif
Input: TX DC power Output: RX RECT power
Efficiency: Output Power / Input Power
Figure 8-2 System Efficiency From DC Input to DC Output
GUID-7E6CD697-AB1E-4E53-AE5F-49A440450B21-low.gif
RILIM = 250 Ω
Figure 8-4 Impact of Load Current ( ILOAD) on Rectifier Voltage (VRECT)
GUID-EF4CF78B-5F1A-43E7-9A66-7F9D7FCCE632-low.gif
Maximum Current = 1 A
Figure 8-6 Impact of Load Current on Output Voltage
GUID-AAFAB90A-CFDF-4454-8BD4-A067C01B984C-low.gifFigure 8-8 VOUT vs Temperature
GUID-19E637ED-7C90-4B6B-9C36-508B0CDF900D-low.pngFigure 8-10 1-A Load Step Full System Response
GUID-587AF3DD-B765-4C4D-89AB-9E3BC478FA33-low.gifFigure 8-12 Rectifier Overvoltage Clamp (fop = 110 kHz)
GUID-7687B743-363D-4442-857C-B4E62D4241E6-low.gifFigure 8-14 Adapter Insertion (VAD = 10 V)
GUID-8768D354-B55B-4065-8E69-5B37017BD0FB-low.gifFigure 8-16 On-the-Go Enabled (VOTG = 3.5 V) (3)
GUID-AD2A060D-8833-443F-9354-75C15250B675-low.gifFigure 8-18 Adaptive Communication Limit Event Where the 400-mA Current Limit is Enabled (IOUT-DC < 300 mA)
GUID-E02E5078-A901-4F38-B53E-C7F22FEA501E-low.gifFigure 8-20 RX Communication Packet Structure
  1. Efficiency measured from DC input to the transmitter to DC output of the receiver. The BQ500210EVM-689 TX was used for these measurements. Measurement subject to change if an alternate TX is used.
  2. Total droop experienced at the output is dependent on receiver coil design. The output impedance must be low enough at that particular operating frequency in order to not collapse the rectifier below 5 V.
  3. On-the-go mode is enabled by driving EN1 high. In this test, the external PMOS is connected between the output of the BQ51013B-Q1 device and the AD pin; therefore, any voltage source on the output is supplied to the AD pin.