SLUSB42F July   2012  – June 2017

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Options
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
      1. 8.1.1 A Brief Description of the Wireless System
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Using the bq5105x as a Wireless Li-Ion/Li-Pol Battery Charger (With Reference to )
      2. 8.3.2 Details of a Qi Wireless Power System and bq5105xB Power Transfer Flow Diagrams
      3. 8.3.3 Battery Charge Profile
      4. 8.3.4 Battery Charging Process
        1. 8.3.4.1  Precharge Mode (VBAT ≤ VLOWV)
        2. 8.3.4.2  Fast Charge Mode / Constant Voltage Mode
        3. 8.3.4.3  Battery Charge Current Setting Calculations
          1. 8.3.4.3.1 RILIM Calculations
          2. 8.3.4.3.2 Termination Calculations
        4. 8.3.4.4  Battery-Charger Safety and JEITA Guidelines
          1. 8.3.4.4.1 bq51050B and bq51051B JEITA
          2. 8.3.4.4.2 bq51052B Modified JEITA
        5. 8.3.4.5  Input Overvoltage
        6. 8.3.4.6  End Power Transfer Packet (WPC Header 0x02)
        7. 8.3.4.7  Status Output
        8. 8.3.4.8  Communication Modulator
        9. 8.3.4.9  Adaptive Communication Limit
        10. 8.3.4.10 Synchronous Rectification
        11. 8.3.4.11 Internal Temperature Sense (TS Function of the TS/CTRL Pin)
          1. 8.3.4.11.1 TS/CTRL Function
          2. 8.3.4.11.2 Thermal Protection
        12. 8.3.4.12 WPC v1.2 Compatibility
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 bq51050B Used as a Wireless Power Receiver and Li-Ion/Li-Pol Battery Charger
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Series and Parallel Resonant Capacitor Selection
          2. 9.2.1.2.2 COMM, CLAMP and BOOT Capacitors
          3. 9.2.1.2.3 Charging and Termination Current
          4. 9.2.1.2.4 Adapter Enable
          5. 9.2.1.2.5 Charge Indication and Power Capacitors
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Application for Wired Charging
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Blocking Back-Back FET
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RHL|20
  • YFP|28
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

YFP Package
28-Pin DSBGA
Top View
RHL Package
20-Pin VQFN With Exposed Thermal Pad
Top View
The exposed thermal pad should be connected to ground.

Pin Functions

Pin I/O DESCRIPTION
NAME DSBGA VQFN
AC1 B3, B4 2 I Input power from receiver coil.
AC2 B1, B2 19 I Input power from receiver coil.
AD G4 9 I If AD functionality is used, connect this pin to the wired adapter input. When VAD-Pres is applied to this pin wireless charging is disabled and AD_ENn is driven low. Connect a 1-µF capacitor from AD to PGND. If unused, the capacitor is not required and AD should be connected directly to PGND.
AD-EN F3 8 O Push-pull driver for external PFET when wired charging is active. Float if not used.
BAT D1 4 O Output pin, delivers power to the battery while applying the internal charger profile.
D2
D3
D4
BOOT1 C4 3 O Bootstrap capacitors for driving the high-side FETs of the synchronous rectifier. Connect a 10-nF ceramic capacitor from BOOT1 to AC1 and from BOOT2 to AC2.
BOOT2 C1 17 O
CHG F4 7 O Open-drain output – active when BAT is enabled. Float if not used.
CLAMP1 E3 5 O Open-drain FETs which are used for a non-power dissipative overvoltage AC clamp protection. When the RECT voltage goes above 15 V, both switches will be turned on and the capacitors will act as a low impedance to protect the device from damage. If used, capacitors are used to connect CLAMP1 to AC1 and CLAMP2 to AC2. Recommended connections are 0.47-µF capacitors.
CLAMP2 E2 16 O
COMM1 E4 6 O Open-drain outputs used to communicate with primary by varying reflected impedance. Connect a capacitor from COMM1 to AC1 and a capacitor from COMM2 to AC2 for capacitive load modulation. For resistive modulation connect COMM1 and COMM2 to RECT through a single resistor. See Communication Modulator for more information.
COMM2 E1 15 O
EN2 G2 11 I Used to set priority between wireless power and wired power. EN2 low enables wired charging source if AD input voltage is present. EN2 high disables wired charging source and wireless power is enabled if present.
FOD F2 14 I Input for the rectified power measurement. See WPC v1.2 Compatibility for details.
ILIM G1 12 I/O Programming pin for the battery charge current. The total resistance from ILIM to PGND (RILIM) sets the charge current. Figure 32 shows RILIM to be R1 + RFOD. Details can be found in Electrical Characteristics and Battery Charge Current Setting Calculations.
PGND A1 1, 20 Power ground
A2
A3
A4
RECT C2, C3 18 O Filter capacitor for the internal synchronous rectifier. Connect a ceramic capacitor to PGND. Depending on the power levels, the value may be from 4.7 μF to 22 μF.
TERM G3 10 I Input that is used to set the termination threshold. Termination current is the battery current level below which the charge process will cease. The termination current is set as a percentage of the charge current. See Battery Charge Current Setting Calculations for more details.
TS/CTRL F1 13 I Temperature Sense (TS) and Control (CTRL) pin functionality. For the TS functionality connect TS/CTRL to ground through a Negative Temperature Coefficient (NTC) resistor. If an NTC function is not desired, connect to PGND with a 10-kΩ resistor. As a CTRL pin pull low to send end power transfer (EPT) fault to the transmitter or pull up to an internal rail to send EPT termination to the transmitter. See Internal Temperature Sense (TS Function of the TS/CTRL Pin) for more details.
PAD The exposed thermal pad should be connected to ground (PGND).