SLUSBS9A February   2014  – July 2014

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 Handling Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Dynamic Rectifier Control
      2. 9.3.2  Dynamic Power Scaling
      3. 9.3.3  VO_REG and VIREG Calculations
      4. 9.3.4  RILIM Calculations
      5. 9.3.5  Adapter Enable Functionality
      6. 9.3.6  Turning Off the Transmitter
        1. 9.3.6.1 WPC End Power Transfer (EPT)
        2. 9.3.6.2 PMA EOC
      7. 9.3.7  CM_ILIM
      8. 9.3.8  PD_DET and TMEM
      9. 9.3.9  TS, Both WPC and PMA
      10. 9.3.10 I2C Communication
      11. 9.3.11 Input Overvoltage
    4. 9.4 Device Functional Modes
    5. 9.5 Register Maps
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Dual Mode Design (WPC and PMA Compliant) Power Supply 5-V Output With 1-A Maximum Current
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1  Output Voltage Set Point
          2. 10.2.1.2.2  Output and Rectifier Capacitors
            1. 10.2.1.2.2.1 TMEM
          3. 10.2.1.2.3  Maximum Output Current Set Point
          4. 10.2.1.2.4  TERM Resistor
          5. 10.2.1.2.5  Setting LPRB1 and LPRB2 Resistors
          6. 10.2.1.2.6  I2C
          7. 10.2.1.2.7  Communication Current Limit
          8. 10.2.1.2.8  Receiver Coil
          9. 10.2.1.2.9  Series and Parallel Resonant Capacitors
          10. 10.2.1.2.10 Communication, Boot and Clamp Capacitors
        3. 10.2.1.3 Application Curves
      2. 10.2.2 bq51221 Embedded in System Board
      3. 10.2.3 bq51221 Implemented in Back Cover
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Trademarks
    2. 13.2 Electrostatic Discharge Caution
    3. 13.3 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Revision History

Changes from * Revision (February 2014) to A Revision

  • Removed active low from pin in Absolute Maximum RatingsGo
  • Added negative values for ESD in Handling RatingsGo
  • Corrected inconsistencies in parameter subscripts in the Electrical CharacteristicsGo
  • Changed nominal value of ICOMM in Electrical Characteristics and Table 4Go
  • Changed Added a link to the calculations in the Dynamic Power Scaling section Go
  • Changed to 215 (to match EC)Go
  • Changed VHOT to VTS-HOT, added footnote Go
  • Changed conditions of Over Voltage and No Response in Table 3 (End Power Transfer Codes in WPC)Go
  • Added value 0x05 for completeness - not used Go
  • Changed enable / disable states for CM_ILIM Go
  • Changed Equation 8 to reflect proper formula for RMEMGo
  • Changed Figure 13 to show correct flow Go
  • Changed Figure 14 to show 2 attempts allowed in Active Power Transfer for PMA Go
  • Changed Figure 15 and added description for PMA Active Power Control Go
  • Corrected V(UVLO) to VUVLO in Register MapsGo
  • Changed from noting bq51221 Go
  • Deleted reference to non-existant register Go
  • Changed from 10000000 to reflect correct reset state Go
  • Changed RsFOD bits to reflect correct scaling Go
  • Added Table 13 for Memory Location 0xEF to indicate Transmitter type Go
  • Corrected pin name typo Go