SLUSC16B November   2015  – March 2019

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Charge Pump Control
      2. 7.3.2 Pin Enable Controls
        1. 7.3.2.1 External Control of CHG and DSG Output Drivers
        2. 7.3.2.2 External Control of PCHG Output Driver
        3. 7.3.2.3 Pack Monitor Enable
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Recommended System Implementation
        1. 8.1.1.1 bq76200 Slave Device
        2. 8.1.1.2 Flexible Control via AFE or via MCU
        3. 8.1.1.3 Scalable VDDCP Capacitor to Support Multiple FETs in Parallel
        4. 8.1.1.4 Precharge and Predischarge Support
        5. 8.1.1.5 Optional External Gate Resistor
        6. 8.1.1.6 Separate Charge and Discharge paths
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.1.1.4 Precharge and Predischarge Support

For a deeply depleted battery pack, a much lower charging current, for example, a C/10 rate, is usually used to precharge the battery cells. This allows the passivating layer of the cell to be recovered slowly (the passivating layer might be dissolved in the deep discharge state).

The bq76200 has a PCHG output to drive an external P-channel FET to support battery precharge. In this scenario, the external P-channel FET is placed in parallel with the CHG FET and a power resistor can be connected in series of the P-channel FET to limit the charging current during the precharge state. The MCU can be used to control the PCHG_EN pin to determine the entry and exit of the precharge mode.

bq76200 Apps4.gifFigure 9. P-Channel FET in Parallel with CHG FET for Precharging (Partial Schematic Shown)

Alternatively, the CHG pin can also be used to precharge a battery pack given if the charging current is controlled by the system (that is, does not require external component to limit the charging current such as a smart charger) and the battery stack voltage is higher than minimum operation voltage of the bq76200 (that is, the charge pump can start to turn on the CHG FET). PCHG should leave floating if it is not used in the application.

The PCHG output can be used to predischarge a high-capacitive system. For example, a load removal can be one of the recovery requirements after a discharge related fault has been detected. In a high-capacitive system, the residual voltage at the system side can take a significant time to bleed off. This results in an additional delay in fault recovery. The PCHG output can be used to control an external P-channel FET placed in parallel with the DSG FET to predischarge the residual voltage in order to speed up the fault recovery process.

bq76200 Apps2.gifFigure 10. P-Channel FET in Parallel with DSG FET for Predischarging (Partial Schematic Shown)