SLUSBK2I October   2013  – March 2022 BQ76920 , BQ76930 , BQ76940

PRODMIX  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1. 6.1 Versions
    2. 6.2 BQ76920 Pin Diagram
    3. 6.3 BQ76930 Pin Diagram
    4. 6.4 BQ76940 Pin Diagram
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Subsystems
        1. 8.3.1.1 Measurement Subsystem Overview
          1. 8.3.1.1.1 Data Transfer to the Host Controller
          2. 8.3.1.1.2 14-Bit ADC
            1. 8.3.1.1.2.1 Optional Real-Time Calibration Using the Host Microcontroller
          3. 8.3.1.1.3 16-Bit CC
          4. 8.3.1.1.4 External Thermistor
          5. 8.3.1.1.5 Die Temperature Monitor
          6. 8.3.1.1.6 16-Bit Pack Voltage
          7. 8.3.1.1.7 System Scheduler
        2. 8.3.1.2 Protection Subsystem
          1. 8.3.1.2.1 Integrated Hardware Protections
          2. 8.3.1.2.2 Reduced Test Time
        3. 8.3.1.3 Control Subsystem
          1. 8.3.1.3.1 FET Driving (CHG AND DSG)
            1. 8.3.1.3.1.1 High-Side FET Driving
          2. 8.3.1.3.2 Load Detection
          3. 8.3.1.3.3 Cell Balancing
          4. 8.3.1.3.4 Alert
          5. 8.3.1.3.5 Output LDO
        4. 8.3.1.4 Communications Subsystem
    4. 8.4 Device Functional Modes
      1. 8.4.1 NORMAL Mode
      2. 8.4.2 SHIP Mode
    5. 8.5 Register Maps
      1. 8.5.1 Register Details
      2. 8.5.2 Read-Only Registers
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Device Timing
      2. 9.1.2 Random Cell Connection
      3. 9.1.3 Power Pin Diodes
      4. 9.1.4 Alert Pin
      5. 9.1.5 Sense Inputs
      6. 9.1.6 TSn Pins
      7. 9.1.7 Unused Pins
      8. 9.1.8 Configuring Alternative Cell Counts
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Step-by-Step Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
    3. 12.3 Related Links
    4. 12.4 Receiving Notification of Documentation Updates
    5. 12.5 Trademarks
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.1 Absolute Maximum Ratings

Over-operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
VBAT Supply voltage (BAT–VSS) BQ76920 –0.3 36 V
(BAT–VC5x), (VC5x–VSS) BQ76930
(BAT–VC10x), (VC10x–VC5x), (VC5x–VSS) BQ76940
VI Input voltage (VCn–VSS) where n = 1..5 BQ76920, BQ76930, BQ76940 –0.3 (n × 7.2) V
(VCn-VC5x) where n = 6..10 BQ76930, BQ76940 (n–5) × 7.2
(VCn–VC10x) where n = 11..15 BQ76940 (n–10) × 7.2
Cell input pins, differential (VCn–VCn–1) where n = 1..15/10/5 (BQ76940/BQ76930/BQ76920, respectively) –0.3 9 V
SRN, SRP, SCL, SDA –0.3 3.6 V
(VC0–VSS), (CAP1–VSS), (TS1–VSS)(2) BQ76920
(VC0–VSS), (VC5b–VC5x), (CAP2–VC5x), (CAP1–VSS), (TS2–VC5x), (TS1–VSS)(2) BQ76930
(VC0–VSS), (VC5b–VC5x), (VC10b–VC10x), (CAP3–VC10x), (CAP2–VC5x), (CAP1–VSS), (TS3–VC10x), (TS2–VC5x), (TS1–VSS)(2) BQ76940
REGSRC –0.3 36
VO Output voltage REGOUT, ALERT –0.3 3.6 V
DSG –0.3 20
CHG –0.3 VCHGCLAMP
ICB Cell balancing current (per cell) BQ76920 70 mA
BQ76930, BQ76940 5 mA
IDSG Discharge pin input current when disabled (measured into terminal) 7 mA
TSTG Storage temperature –65 150 °C
Lead temperature (soldering, 10 s) 300
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
(2) The Absolute Maximum Ratings for (TS1–VSS) apply after the device completes POR and should be observed after tBOOTREADY (10 ms), following the application of the boot signal on TS1. Prior to completion of POR, TS1 should not exceed 5 V.