SLUSE36J
July 2021 – November 2023
BQ77216
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Description (continued)
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
DC Characteristics
7.6
Timing Requirements
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Voltage Fault Detection
8.3.2
Open-Wire Fault Detection
8.3.3
Temperature Fault Detection
8.3.4
Oscillator Health Check
8.3.5
Sense Positive Input for Vx
8.3.6
Output Drive, COUT and DOUT
8.3.7
The LATCH Function
8.3.8
Supply Input, VDD
8.4
Device Functional Modes
8.4.1
NORMAL Mode
8.4.2
FAULT Mode
8.4.3
Customer Test Mode
9
Application and Implementation
9.1
Application Information
9.1.1
Design Requirements
9.1.2
Detailed Design Procedure
9.1.2.1
Cell Connection Sequence
9.2
Systems Example
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Third-Party Products Disclaimer
12.2
Receiving Notification of Documentation Updates
12.3
Support Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Revision History
14
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PW|24
MPDS363A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sluse36j_oa
sluse36j_pm
1
Features
3-series cell to 16-series cell protection
High-accuracy overvoltage protection
± 10 mV at 25°C
± 20 mV from 0°C to 60°C
Overvoltage protection options from 3.55 V to
5.1 V
Undervoltage protection with options from 1.0 V to 3.5 V
Open-wire connection detection
Overtemperature protection
Random cell connection
Functional safety-capable
Fixed internal delay timers
Fixed detections thresholds
Fixed output drive type for each of COUT and DOUT
Active high or active low
Active high drive to 6 V
Open drain with the ability to be pulled up externally to VDD
Low power consumption I
CC
≈ 1 µA
(V
CELL(ALL)
< V
OV
)
Low leakage current per cell input < 100 nA with open wire detection disabled
Package footprint options:
Leaded 24-pin TSSOP with 0.65-mm lead pitch