SLUSCM3K June   2016  – July 2020 BQ77904 , BQ77905

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
      1. 8.1.1 Device Functionality Summary
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Protection Summary
      2. 8.3.2  Fault Operation
        1. 8.3.2.1  Operation in OV
        2. 8.3.2.2  Operation in UV
        3. 8.3.2.3  Operation in OW
        4. 8.3.2.4  Operation in OCD1
        5. 8.3.2.5  Operation in OCD2
        6. 8.3.2.6  Operation in SCD
        7. 8.3.2.7  Overcurrent Recovery Timer
        8. 8.3.2.8  Load Removal Detection
        9. 8.3.2.9  Load Removal Detection in UV
        10. 8.3.2.10 Operation in OTC
        11. 8.3.2.11 Operation in OTD
        12. 8.3.2.12 Operation in UTC
        13. 8.3.2.13 Operation in UTD
      3. 8.3.3  Protection Response and Recovery Summary
      4. 8.3.4  Configuration CRC Check and Comparator Built-In-Self-Test
      5. 8.3.5  Fault Detection Method
        1. 8.3.5.1 Filtered Fault Detection
      6. 8.3.6  State Comparator
      7. 8.3.7  DSG FET Driver Operation
      8. 8.3.8  CHG FET Driver Operation
      9. 8.3.9  External Override of CHG and DSG Drivers
      10. 8.3.10 Configuring 3-S, 4-S, or 5-S Mode
      11. 8.3.11 Stacking Implementations
      12. 8.3.12 Zero-Volt Battery Charging Inhibition
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power Modes
        1. 8.4.1.1 Power-On Reset (POR)
        2. 8.4.1.2 FAULT Mode
        3. 8.4.1.3 SHUTDOWN Mode
        4. 8.4.1.4 Customer Fast Production Test Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Recommended System Implementation
        1. 9.1.1.1 CHG and DSG FET Rise and Fall Time
        2. 9.1.1.2 Protecting CHG and LD
        3. 9.1.1.3 Protecting CHG FET
        4. 9.1.1.4 Using Load Detect for UV Fault Recovery
        5. 9.1.1.5 Temperature Protection
        6. 9.1.1.6 Adding Filter to Sense Resistor
        7. 9.1.1.7 Using a State Comparator in an Application
          1. 9.1.1.7.1 Examples
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Design Example
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Links
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Device Comparison

DEVICE NUMBER OF CELLS PROTECTIONS TYPICAL NORMAL MODE CURRENT (µA) PACKAGE
BQ77904 3, 4 OV, UV, OW, OTD, OTC, UTD, UTC, OCD1, OCD2, SCD, CTRC, CTRD 6 20-TSSOP
BQ77905 3, 4, 5

Unless otherwise specified, the devices in Table 5-1 and Table 5-2 come, by default, with the state comparator enabled with a 2-mV threshold. Filtered fault detection is used by default. Contact Texas Instruments for new configuration options or devices in preview.

Table 5-1 BQ77904 Device Comparison
Part Number OV UV OW OCD1
Threshold (mV) Delay(s) Hyst (mV) Thresh (mV) Delay(s) Hyst (mV) Load Removal Recovery (Y/N) Current (nA) Threshold (mV) Delay (ms)
BQ7790400 4225 2 100 2200 2 400 Y 0 (disable) 40 1420
Part Number (Cont.) OCD2 SCD Current Fault Recovery Temperature (°C)(1)
Delay (ms) Threshold (mV) Delay (s) Method OTD OTC UTD UTC
BQ7790400 350 100 0 Load Removal 70 50 –20 –5
(1) These thresholds are target based on temperature, but they are dependent on external components that could vary based on customer selection. The circuit is based on the 103AT NTC thermistor connected to TS and VSS, and a 10-kΩ resistor connected to VTB and TS. Actual thresholds must be determined in mV. Refers to the overtemperature and undertemperature mV threshold in the Electrical Characteristics table.
Table 5-2 BQ77905 Device Comparison
Part Number OV UV OW OCD1
Threshold (mV) Delay(s) Hyst (mV) Thresh (mV) Delay(s) Hyst (mV) Load Removal Recovery (Y/N) Current (nA) Threshold (mV) Delay (ms)
BQ7790500 4200 0.5 100 2600 1 400 Y 100 30 1420
BQ7790502 4250 1 200 2700 1 200 Y 100 85 700
BQ7790503 4200 1 100 2700 2 400 Y 100 80 1420
BQ7790505 4250 1 200 2700 1 200 N 0 60 10
BQ7790508 3900 1 200 2000 1 400 Y 100 50 700
BQ7790509 4250 1 100 2500 1 400 Y 100 50 700
BQ7790511 4250 1 200 2700 1 200 Y 100 50 350
BQ7790512 4175 1 100 2800 1 400 Y 100 75 1420
BQ7790518 4250 1 100 2750 1 200 Y 100 70 180
BQ7790521 3700 1 200 2500 1 200 Y 100 70 180
BQ7790522 4250 1 100 2800 1 200 Y 100 80 700
Part Number (Cont.) OCD2 SCD Current Fault Recovery Temperature (°C)(1)
Threshold (mV) Delay (ms) Threshold (mV) Delay (s) Method OTD OTC UTD UTC
BQ7790500 50 700 120 1 Load Removal + Delay 70 50 –20 0
BQ7790502 120 350 240 — Load Removal 70 50 –20 –5
BQ7790503 160 350 320 — Load Removal 70 50 –20 –5
BQ7790505 80 5 100 9 Load Removal + Delay 65 45 –20 0
BQ7790508 100 90 200 1 Load Removal + Delay 70 50 –20 –5
BQ7790509 100 90 200 1 Load Removal + Delay 70 50 –20 –5
BQ7790511 120 90 280 — Load Removal 65 45 –20 0
BQ7790512 150 350 300 1 Load Removal + Delay 65 45 –20 0
BQ7790518 140 20 300 1 Load Removal 70 50 –20 0
BQ7790521 140 20 320 1 Load Removal 70 50 –20 0
BQ7790522 100 350 300 1 Load Removal 70 50 –20 –5
(1) These thresholds are target based on temperature, but they are dependent on external components that could vary based on customer selection. Circuit is based on 103AT NTC thermistor connected to TS and VSS, and a 10-kΩ resistor connected to VTB and TS. Actual thresholds must be determined in mV. Refers to the overtemperature and undertemperature mV threshold in the Electrical Characteristics table.