SLUSF21 Data sheet

SLUSF21 june 2023 BQ79616

PRODUCTION DATA

Package Options

Mechanical Data (Package|Pins)

PAP|64
- MPQF071C

Thermal pad, mechanical data (Package|Pins)

PAP|64
- PPTD012N

Orderable Information

8.3.6.1.1.2.2.2 Stack Read/Write

Stack Read:

The device address, COMM_CTRL[STACK_DEV] bit and [TOP_STACK] bit must be configured before using this command. A stack read command generates a number of response frames depending on the number of devices in the stack (that is, device with COMM_CTRL[STACK_DEV] = 1), whose length depends on the requested number of register bytes read. The stack read command frame must contain the register address to start at (address field) and the number of bytes to return (number of registers to read). The DATA_SIZE field in the initialization byte for the read command is always 0b000.

The command frame travels to all devices in the daisy chain, but only the device with COMM_CTRL[STACK_DEV] = 1 will respond. During the response, the device with COMM_CTRL[TOP_STACK] = 1 will return the response frame first. Each device (address N) in the stack waits until the device above (address N+1) responds before appending its response frame. The CRC is validated while receiving the responses. If a CRC error occurs in the response frame from address N+1, device N does not append its message and an invalid CRC fault is generated.

Use Figure 8-29 with the example of using reading 16 cell voltages from S1 to S3. The response to this command is 3 separate response frames (one response frame per device), each frame with a total length of 38 bytes (32 data bytes + 6 protocol bytes). Although the stack read command does not contain the device address field, each response frame will contain the corresponding device address field associating the data to a particular device. The host will receive a response frame from S3 first (ToS), following with a response frame from S2, and finally the response frame from S1.

Stack Write:

The COMM_CTRL[STACK_DEV] must be configured before using this command. A stack write command enables the host to update up to eight consecutive registers for the stack devices (that is, device with COMM_CTRL[STACK_DEV] = 1) with one command. The command frame must contain the register address to start at (address field) and the data bytes to write to the registers. The DATA_SIZE field in the initialization frame is the number of registers to update.

The command frame travels to all devices in the daisy chain, but only the device with COMM_CTRL[STACK_DEV] = 1 will execute the command.

Figure 8-29 Stack Read/Write

Table 8-15 Stack Read/Write

	Stack Read Command Sent by Host		Stack Write Command Sent by Host
Example	Read 16 Cell Voltages from S1 to S3		Write OTP Unlock Code to OTP_PROG_UNLOCK1A to 1D Registers to S1, S2, and S3
Frame Field	Data	Comments	Data	Comments
Initialization Byte	0xA0	Always 0xA0 FRAME_TYPE = 1 REQ_TYPE = 0b010 = Stack Read DATA_SIZE = 0b000	0xB3	0xB0 for 1 byte data read, 0xB1 for 2 bytes data read, 0xB2 for 3 bytes data read, and so on. For this example: FRAME_TYPE = 1 REQ_TYPE = 0b011= Stack Write
Initialization Byte	0xA0		0xB3	DATA_SIZE = 0b011 = 4 bytes
Device Address	N/A	No need to include the device address byte in command frame	N/A	No need to include the device address byte in command frame
Register Address	0x0568	Start address of the register block to read (address of VCELL16_HI in this example)	0x0300	Start address of the register block to write (address of OTP_PROG_UNLOCK1A in this example)
Data	0x1F	Instruct each device to return 32 bytes of data (that is, from address 0x0568 to 0x0587), assuming each VCELLn_HI = 0x80, VCELLn_LO = 0x00, where n = 1 to 16.	0x02B7 78BC	The unlock value to OTP_PROG_UNLOCK1A to OTP_PROG_UNLOCK1D
CRC	0x5C2D		0x0BD7