SLUSE48B May 2021 – November 2023 BQ79652-Q1 , BQ79654-Q1 , BQ79656-Q1
PRODUCTION DATA
DEBUG_UART_VALID_HI
Address | 0x078C | |||||||
Read Only | Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
Name | COUNT[7:0] | |||||||
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
COUNT[7:0] = | The high-byte of UART frame counter to track the number of valid frames received or transmitted. Counter saturates when both DEBUG_UART_VALID_HI/LO is 0xFF. This register is latched and the related counter is reset when DEBUG_UART_DISCARD is read. |
DEBUG_UART_VALID_LO
Address | 0x078D | |||||||
Read Only | Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
Name | COUNT[7:0] | |||||||
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
COUNT[7:0] = | The low-byte of UART frame counter to track the number of valid frames received or transmitted. Counter saturates when both DEBUG_UART_VALID_HI/LO is 0xFF. This register is latched and the related counter is reset when DEBUG_UART_DISCARD is read. |