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  • CC1120 High-Performance RF Transceiver for Narrowband Systems

    • SWRS112H June   2011  – July 2015 CC1120

      PRODUCTION DATA.  

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  • CC1120 High-Performance RF Transceiver for Narrowband Systems
  1. 1Device Overview
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Functional Block Diagram
  2. 2Revision History
  3. 3Terminal Configuration and Functions
    1. 3.1 Pin Diagram
    2. 3.2 Pin Configuration
  4. 4Specifications
    1. 4.1  ESD Ratings
    2. 4.2  Recommended Operating Conditions (General Characteristics)
    3. 4.3  RF Characteristics
    4. 4.4  Power Consumption Summary
    5. 4.5  Receive Parameters
    6. 4.6  Transmit Parameters
    7. 4.7  PLL Parameters
    8. 4.8  32-MHz Clock Input (TCXO)
    9. 4.9  32-MHz Crystal Oscillator
    10. 4.10 32-kHz Clock Input
    11. 4.11 32-kHz RC Oscillator
    12. 4.12 I/O and Reset
    13. 4.13 Temperature Sensor
    14. 4.14 Thermal Resistance Characteristics for RHB Package
    15. 4.15 Timing Requirements
    16. 4.16 Regulatory Standards
    17. 4.17 Typical Characteristics
  5. 5Detailed Description
    1. 5.1 Block Diagram
    2. 5.2 Frequency Synthesizer
    3. 5.3 Receiver
    4. 5.4 Transmitter
    5. 5.5 Radio Control and User Interface
    6. 5.6 Enhanced Wake-On-Radio (eWOR)
    7. 5.7 Sniff Mode
    8. 5.8 Antenna Diversity
    9. 5.9 WaveMatch
  6. 6Application, Implementation, and Layout
    1. 6.1 Application Information
      1. 6.1.1 Typical Application Circuit
      2. 6.1.2 TI Reference Designs
  7. 7Device and Documentation Support
    1. 7.1 Device Support
      1. 7.1.1 Development Support
        1. 7.1.1.1 Configuration Software
      2. 7.1.2 Device and Development-Support Tool Nomenclature
    2. 7.2 Documentation Support
      1. 7.2.1 Community Resources
    3. 7.3 Trademarks
    4. 7.4 Electrostatic Discharge Caution
    5. 7.5 Glossary
  8. 8Mechanical Packaging and Orderable Information
  9. IMPORTANT NOTICE

Package Options

Mechanical Data (Package|Pins)
  • RHB|32
    • MPQF130D
Thermal pad, mechanical data (Package|Pins)
  • RHB|32
    • QFND029X
Orderable Information
  • swrs112h_oa
  • swrs112h_pm
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  • Full reading width
    • Full reading width
    • Comfortable reading width
    • Expanded reading width
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DATA SHEET

CC1120 High-Performance RF Transceiver for Narrowband Systems

1 Device Overview

1.1 Features

  • High-Performance, Single-Chip Transceiver
    • Adjacent Channel Selectivity:
      64 dB at 12.5-kHz Offset
    • Blocking Performance: 91 dB at 10 MHz
    • Excellent Receiver Sensitivity:
      • –123 dBm at 1.2 kbps
      • –110 dBm at 50 kbps
      • –127 dBm Using Built-in Coding Gain
    • Very Low Phase Noise:
      –111 dBc/Hz at 10-kHz Offset
  • Suitable for Systems Targeting ETSI Category 1 Compliance in 169-MHz and 433-MHz Bands
  • High Spectral Efficiency (9.6 kbps in 12.5-kHz Channel in Compliance With FCC Narrowbanding Mandate)
  • Separate 128-Byte RX and TX FIFOs
  • Support for Seamless Integration With the CC1190 Device for Increased Range Giving up to 3-dB Improvement in Sensitivity and up to +27-dBm Output Power
  • Power Supply
    • Wide Supply Voltage Range (2.0 V to 3.6 V)
    • Low Current Consumption:
      • RX: 2 mA in RX Sniff Mode
      • RX: 17 mA Peak Current in Low-Power Mode
      • RX: 22 mA Peak Current in
        High-Performance Mode
      • TX: 45 mA at +14 dBm
    • Power Down: 0.12 μA
      (0.5 μA With eWOR Timer Running)
  • Programmable Output Power up to +16 dBm With 0.4-dB Step Size
  • Automatic Output Power Ramping
  • Configurable Data Rates: 0 to 200 kbps
  • Supported Modulation Formats: 2-FSK,
    2-GFSK, 4-FSK, 4-GFSK, MSK, OOK
  • WaveMatch: Advanced Digital Signal Processing for Improved Sync Detect Performance
  • RoHS-Compliant 5-mm × 5-mm No-Lead QFN
    32-Pin Package (RHB)
  • Regulations – Suitable for Systems Targeting Compliance With
    • Europe: ETSI EN 300 220, ETSI EN 54-25
    • US: FCC CFR47 Part 15, FCC CFR47 Part 90, 24, and 101
    • Japan: ARIB RCR STD-T30, ARIB STD-T67, ARIB STD-T108
  • Peripherals and Support Functions
    • Enhanced Wake-On-Radio (eWOR) Functionality for Automatic Low-Power Receive Polling
    • Includes Functions for Antenna Diversity Support
    • Support for Retransmissions
    • Support for Automatic Acknowledge of Received Packets
    • TCXO Support and Control, Also in Power Modes
    • Automatic Clear Channel Assessment (CCA) for Listen-Before-Talk (LBT) Systems
    • Built-in Coding Gain Support for Increased Range and Robustness
    • Digital RSSI Measurement
    • Temperature Sensor

1.2 Applications

  • Narrowband Ultra-Low-Power Wireless Systems With Channel Spacing Down to
    12.5 kHz
  • 169-, 315-, 433-, 868-, 915-, 920-, 950-MHz ISM/SRD Band
  • Wireless Metering and Wireless Smart Grid
    (AMR and AMI)
  • IEEE 802.15.4g Systems
  • Home and Building Automation
  • Wireless Alarm and Security Systems
  • Industrial Monitoring and Control
  • Wireless Healthcare Applications
  • Wireless Sensor Networks and Active RFID
  • Private Mobile Radios

1.3 Description

The CC1120 device is a fully integrated single-chip radio transceiver designed for high performance at very low-power and low-voltage operation in cost-effective wireless systems. All filters are integrated, thus removing the need for costly external SAW and IF filters. The device is mainly intended for Industrial, Scientific, and Medical (ISM) applications and Short Range Device (SRD) frequency bands at
164 to 192 MHz, 274 to 320 MHz, 410 to 480 MHz, and 820 to 960 MHz.

The CC1120 device provides extensive hardware support for packet handling, data buffering, burst transmissions, clear channel assessment, link quality indication, and wake-on-radio. The main operating parameters of the CC1120 device can be controlled through an SPI interface. In a typical system, the CC1120 device is used with a microcontroller and only a few external passive components.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
CC1120 VQFN (32) 5.00 mm × 5.00 mm
(1) For more information, see Section 8, Mechanical Packaging and Orderable Information

1.4 Functional Block Diagram

Figure 1-1 shows the system block diagram of the CC1120 device.

CC1120 bd_system_swrs112.gifFigure 1-1 Functional Block Diagram

2 Revision History

Changes from G Revision (September 2014) to H Revision

  • Moved storage temperature range back to Absolute Maximum Ratings tableGo
  • Updated the formatting of the Specifications section Go
  • Changed clock frequency minimum value FROM: 32 MHz TO: 31.25 MHz in 32-MHz Clock Input (TCXO)Go
  • Added clock frequency typical value of 32 MHz to 32-MHz Clock Input (TCXO)Go
  • Changed crystal frequency minimum value FROM: 32 MHz TO: 31.25 MHz in the 32-MHz Crystal Oscillator tableGo
  • Added crystal frequency typical value of 32 MHz in the 32-MHz Crystal Oscillator tableGo
  • Changed table title FROM: Wakeup and Timing TO: Timing RequirementsGo

Changes from F Revision (July 2014) to G Revision

  • Added "Ambient" to the temperature range condition and removed Tj from Temperature range Go
  • Added data to TCXO tableGo

3 Terminal Configuration and Functions

3.1 Pin Diagram

Figure 3-1 shows pin names and locations for the CC1120 device.

CC1120 po_swrs112.gifFigure 3-1 Package 5-mm × 5-mm QFN

3.2 Pin Configuration

The following table lists the pinout configuration for the CC1120 device.

PIN TYPE DESCRIPTION
NO. NAME
1 VDD_GUARD Power 2.0–3.6 V VDD
2 RESET_N Digital input Asynchronous, active-low digital reset
3 GPIO3 Digital I/O General-purpose I/O
4 GPIO2 Digital I/O General-purpose I/O
5 DVDD Power 2.0–3.6 VDD to internal digital regulator
6 DCPL Power Digital regulator output to external decoupling capacitor
7 SI Digital input Serial data in
8 SCLK Digital input Serial data clock
9 SO(GPIO1) Digital I/O Serial data out (general-purpose I/O)
10 GPIO0 Digital I/O General-purpose I/O
11 CSn Digital input Active-low chip select
12 DVDD Power 2.0–3.6 V VDD
13 AVDD_IF Power 2.0–3.6 V VDD
14 RBIAS Analog External high-precision resistor
15 AVDD_RF Power 2.0–3.6 V VDD
16 N.C. — Not connected
17 PA Analog Single-ended TX output (requires DC path to VDD)
18 TRX_SW Analog TX and RX switch. Connected internally to GND in TX and floating (high-impedance) in RX.
19 LNA_P Analog Differential RX input (requires DC path to ground)
20 LNA_N Analog Differential RX input (requires DC path to ground)
21 DCPL_VCO Power Pin for external decoupling of VCO supply regulator
22 AVDD_SYNTH1 Power 2.0–3.6 V VDD
23 LPF0 Analog External loop filter components
24 LPF1 Analog External loop filter components
25 AVDD_PFD_CHP Power 2.0–3.6 V VDD
26 DCPL_PFD_CHP Power Pin for external decoupling of PFD and CHP regulator
27 AVDD_SYNTH2 Power 2.0–3.6 V VDD
28 AVDD_XOSC Power 2.0–3.6 V VDD
29 DCPL_XOSC Power Pin for external decoupling of XOSC supply regulator
30 XOSC_Q1 Analog Crystal oscillator pin 1 (must be grounded if a TCXO or other external clock connected to EXT_XOSC is used)
31 XOSC_Q2 Analog Crystal oscillator pin 2 (must be left floating if a TCXO or other external clock connected to EXT_XOSC is used)
32 EXT_XOSC Digital input Pin for external clock input (must be grounded if a regular crystal connected to XOSC_Q1 and XOSC_Q2 is used)
— GND Ground pad The ground pad must be connected to a solid ground plane.

 
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