SWRS293 November 2023 CC1312PSIP
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | TYP | UNIT | |
---|---|---|---|---|
Core Current Consumption | ||||
Icore | Reset | Reset. RESET_N pin asserted or VDDS below power-on-reset threshold (4) | 36 | µA |
Shutdown |
Shutdown. No clocks running, no retention | 150 | nA | |
Standby without cache retention |
RTC running, CPU, 80KB RAM and (partial) register retention. RCOSC_LF |
0.9 | µA | |
RTC running, CPU, 80KB RAM and (partial) register retention XOSC_LF |
1.0 | |||
Standby with cache retention |
RTC running, CPU, 80KB RAM and (partial) register retention XOSC_LF |
2.8 | µA | |
RTC running, CPU, 80KB RAM and (partial) register retention XOSC_LF |
2.9 | |||
Idle | Supply Systems and RAM powered RCOSC_HF |
590 | µA | |
Icore | Active | MCU running CoreMark at 48 MHz RCOSC_HF |
2.89 | mA |
Peripheral Current Consumption | ||||
Iperi | Peripheral power domain | Delta current with domain enabled | 82 | µA |
Serial power domain | Delta current with domain enabled | 5.5 | ||
RF Core | Delta current with power domain enabled, clock enabled, RF core idle |
179 | ||
µDMA | Delta current with clock enabled, module is idle | 54 | ||
Timers | Delta current with clock enabled, module is idle(3) | 68 | ||
I2C | Delta current with clock enabled, module is idle | 8.2 | ||
I2S | Delta current with clock enabled, module is idle | 22 | ||
SSI | Delta current with clock enabled, module is idle(2) | 70 | ||
UART | Delta current with clock enabled, module is idle(1) | 141 | ||
CRYPTO (AES) | Delta current with clock enabled, module is idle | 21 | ||
PKA | Delta current with clock enabled, module is idle | 71 | ||
TRNG | Delta current with clock enabled, module is idle | 30 | ||
Sensor Controller Engine Consumption | ||||
ISCE | Active mode | 24 MHz, infinite loop | 808 | µA |
Low-power mode | 2 MHz, infinite loop | 30.1 |