SWRS293 November   2023 CC1312PSIP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Revision History
  7. 6 Device Comparison
  8. 7 Pin Configuration and Functions
    1. 7.1 Pin Diagram – MOT Package (Top View)
    2. 7.2 Signal Descriptions – MOT Package
    3. 7.3 Connections for Unused Pins and Modules
  9. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Power Supply and Modules
    5. 8.5  Power Consumption - Power Modes
    6. 8.6  Power Consumption - Radio Modes
    7. 8.7  Nonvolatile (Flash) Memory Characteristics
    8. 8.8  Thermal Resistance Characteristics
    9. 8.9  RF Frequency Bands
    10. 8.10 861 MHz to 1054 MHz - Receive (RX)
    11. 8.11 861 MHz to 1054 MHz - Transmit (TX) 
    12. 8.12 861 MHz to 1054 MHz - PLL Phase Noise Wideband Mode
    13. 8.13 861 MHz to 1054 MHz - PLL Phase Noise Narrowband Mode
    14. 8.14 Timing and Switching Characteristics
      1. 8.14.1 Reset Timing
      2. 8.14.2 Wakeup Timing
      3. 8.14.3 Clock Specifications
        1. 8.14.3.1 48 MHz Crystal Oscillator (XOSC_HF) and RF frequency accuracy
        2. 8.14.3.2 48 MHz RC Oscillator (RCOSC_HF)
        3. 8.14.3.3 2 MHz RC Oscillator (RCOSC_MF)
        4. 8.14.3.4 32.768 kHz Crystal Oscillator (XOSC_LF) and RTC accuracy
        5. 8.14.3.5 32 kHz RC Oscillator (RCOSC_LF)
      4. 8.14.4 Synchronous Serial Interface (SSI) Characteristics
        1.       36
          1. 8.14.4.1.1 Synchronous Serial Interface (SSI) Characteristics
      5. 8.14.5 UART
        1. 8.14.5.1 UART Characteristics
    15. 8.15 Peripheral Characteristics
      1. 8.15.1 ADC
        1. 8.15.1.1 Analog-to-Digital Converter (ADC) Characteristics
      2. 8.15.2 DAC
        1. 8.15.2.1 Digital-to-Analog Converter (DAC) Characteristics
      3. 8.15.3 Temperature and Battery Monitor
        1. 8.15.3.1 Temperature Sensor
        2. 8.15.3.2 Battery Monitor
      4. 8.15.4 Comparators
        1. 8.15.4.1 Low-Power Clocked Comparator
        2. 8.15.4.2 Continuous Time Comparator
      5. 8.15.5 Current Source
        1. 8.15.5.1 Programmable Current Source
      6. 8.15.6 GPIO
        1. 8.15.6.1 GPIO DC Characteristics
    16. 8.16 Typical Characteristics
      1. 8.16.1 MCU Current
      2. 8.16.2 RX Current
      3. 8.16.3 TX Current
      4. 8.16.4 RX Performance
      5. 8.16.5 TX Performance
      6. 8.16.6 ADC Performance
      7. 8.16.7 Temperature Compensation
  10. 9 Detailed Description
    1. 9.1  Overview
    2. 9.2  System CPU
    3. 9.3  Radio (RF Core)
      1. 9.3.1 Proprietary Radio Formats
    4. 9.4  Memory
    5. 9.5  Sensor Controller
    6. 9.6  Cryptography
    7. 9.7  Timers
    8. 9.8  Serial Peripherals and I/O
    9. 9.9  Battery and Temperature Monitor
    10. 9.10 µDMA
    11. 9.11 Debug
    12. 9.12 Power Management
    13. 9.13 Clock Systems, production calibration and temperature compensation
    14. 9.14 Network Processor
    15. 9.15 Device Certification and Qualification
      1. 9.15.1 FCC Certification and Statement
      2. 9.15.2 IC/ISED Certification and Statement
    16. 9.16 Module Markings
    17. 9.17 End Product Labeling
    18. 9.18 Manual Information to the End User
  11. 10Application, Implementation, and Layout
    1. 10.1 Application Information
      1. 10.1.1 Typical Application Circuit
    2. 10.2 Device Connection and Layout Fundamentals
      1. 10.2.1 Reset
      2. 10.2.2 Unused Pins
    3. 10.3 PCB Layout Guidelines
      1. 10.3.1 General Layout Recommendations
      2. 10.3.2 RF Layout Recommendations
        1. 10.3.2.1 Antenna Placement and Routing
        2. 10.3.2.2 Transmission Line Considerations
    4. 10.4 Reference Designs
  12. 11Environmental Requirements and SMT Specifications
    1. 11.1 PCB Bending
    2. 11.2 Handling Environment
      1. 11.2.1 Terminals
      2. 11.2.2 Falling
    3. 11.3 Storage Condition
      1. 11.3.1 Moisture Barrier Bag Before Opened
      2. 11.3.2 Moisture Barrier Bag Open
    4. 11.4 PCB Assembly Guide
      1. 11.4.1 PCB Land Pattern & Thermal Vias
      2. 11.4.2 SMT Assembly Recommendations
      3. 11.4.3 PCB Surface Finish Requirements
      4. 11.4.4 Solder Stencil
      5. 11.4.5 Package Placement
      6. 11.4.6 Solder Joint Inspection
      7. 11.4.7 Rework and Replacement
      8. 11.4.8 Solder Joint Voiding
    5. 11.5 Baking Conditions
    6. 11.6 Soldering and Reflow Condition
  13. 12Device and Documentation Support
    1. 12.1 Device Nomenclature
    2. 12.2 Tools and Software
      1. 12.2.1 SimpleLink™ Microcontroller Platform
    3. 12.3 Documentation Support
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.11 861 MHz to 1054 MHz - Transmit (TX) 

Measured on the CC1312PSIP-EM reference design with Tc = 25 °C, VDDS = 3.0 V with DC/DC enabled and high power PA connected to VDDS using 2-GFSK, 50 kbps, ±25 kHz deviation unless otherwise noted.
All measurements are performed at the antenna input. All measurements are performed conducted. (1)
 
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
General parameters
Max output power, boost mode
Regular PA		 VDDR = 1.95 V
Minimum supply voltage (VDDS ) for boost mode is 2.1 V
915 MHz		 14 dBm
Max output power,
Regular PA		 868 MHz and 915 MHz 12.4 dBm
Max output power, High power PA 915 MHz
VDDS = 3.3V		 20 dBm
Output power programmable range
Regular PA		 868 MHz and 915 MHz 34 dB
Output power programmable range
High power PA		 868 MHz and 915 MHz
VDDS = 3.3V		 6 dB
Output power variation over temperature
Regular PA		 +10 dBm setting
Over recommended temperature operating range		 ±2 dB
Output power variation over temperature
Boost mode, regular PA		 +14 dBm setting
Over recommended temperature operating range		 ±1.5 dB
Spurious emissions and harmonics
Spurious emissions (excluding harmonics)
Regular PA(1)		 30 MHz to 1 GHz +14 dBm setting
ETSI restricted bands		 < -54 dBm
+14 dBm setting
ETSI outside restricted bands		 < -36 dBm
1 GHz to 12.75 GHz
(outside ETSI restricted bands)		 +14 dBm setting
measured in 1 MHz bandwidth (ETSI)		 < -30 dBm
Spurious emissions out-of-band
Regular PA, 915 MHz(1)		 30 MHz to 88 MHz
(within FCC restricted bands)		 +14 dBm setting < -56 dBm
88 MHz to 216 MHz
(within FCC restricted bands)		 +14 dBm setting < -52 dBm
216 MHz to 960 MHz
(within FCC restricted bands)		 +14 dBm setting < -50 dBm
960 MHz to 2390 MHz and above 2483.5 MHz (within FCC restricted band) +14 dBm setting <-42 dBm
1 GHz to 12.75 GHz
(outside FCC restricted bands)		 +14 dBm setting < -40 dBm
Spurious emissions out-of-band
High power PA, 915 MHz(1)		 30 MHz to 88 MHz
(within FCC restricted bands)		 +20 dBm setting, VDDS = 3.3 V < -55 dBm
88 MHz to 216 MHz
(within FCC restricted bands)		 +20 dBm setting, VDDS = 3.3 V < -52 dBm
216 MHz to 960 MHz
(within FCC restricted bands)		 +20 dBm setting, VDDS = 3.3 V < -49 dBm
960 MHz to 2390 MHz and above 2483.5 MHz (within FCC restricted band) +20 dBm setting, VDDS = 3.3 V < -41 dBm
1 GHz to 12.75 GHz
(outside FCC restricted bands)		 +20 dBm setting, VDDS = 3.3 V < -20 dBm
Spurious emissions out-of-band
Regular PA, 920.6/928 MHz(1)		 Below 710 MHz
(ARIB T-108)		 +14 dBm setting < -36 dBm
710 MHz to 900 MHz
(ARIB T-108)		 +14 dBm setting < -55 dBm
900 MHz to 915 MHz
(ARIB T-108)		 +14 dBm setting < -55 dBm
930 MHz to 1000 MHz
(ARIB T-108)		 +14 dBm setting < -55 dBm
1000 MHz to 1215 MHz
(ARIB T-108)		 +14 dBm setting < -45 dBm
Above 1215 MHz
(ARIB T-108)		 +14 dBm setting < -30 dBm
Harmonics
Regular PA		 Second harmonic +14 dBm setting, 868 MHz < -30 dBm
+14 dBm setting, 915 MHz < -30
Third harmonic +14 dBm setting, 868 MHz < -30 dBm
+14 dBm setting, 915 MHz < -42
Fourth harmonic +14 dBm setting, 868 MHz < -30 dBm
+14 dBm setting, 915 MHz < -42
Fifth harmonic +14 dBm setting, 868 MHz < -30 dBm
+14 dBm setting, 915 MHz < -42
Harmonics
High power PA		 Second harmonic +20 dBm setting, VDDS = 3.3 V, 915 MHz -32 dBm
Third harmonic +20 dBm setting, VDDS = 3.3 V, 915 MHz -44 dBm
Fourth harmonic +20 dBm setting, VDDS = 3.3 V, 915 MHz -38 dBm
Fifth harmonic +20 dBm setting, VDDS = 3.3 V, 915 MHz -47 dBm
Second harmonic +19 dBm setting, VDDS = 3.3 V, 915 MHz -30 dBm
Third harmonic +19 dBm setting, VDDS = 3.3 V, 915 MHz -50 dBm
Fourth harmonic +19 dBm setting, VDDS = 3.3 V, 915 MHz -45 dBm
Fifth harmonic +19 dBm setting, VDDS = 3.3 V, 915 MHz -44 dBm
Adjacent Channel Power
Adjacent channel power, regular 14 dBm PA Adjacent channel, 20 kHz offset. 9.6 kbps, h=0.5 12.5 dBm setting. 868.3 MHz. 14 kHz channel BW -24 dBm
Alternate channel power, regular 14 dBm PA Alternate channel, 40 kHz offset. 9.6 kbps, h=0.5 12.5 dBm setting. 868.3 MHz. 14 kHz channel BW -31 dBm
(1) Suitable for systems targeting compliance with EN 300 220, EN 303 131, EN 303 204, FCC CFR47 Part 15, ARIB STD-T108.