SWRS252A May   2021  – November 2021 CC2652P7

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1. 3.1 Functional Block Diagram
  4. 4 Revision History
  5. 5 Device Comparison
  6. 6 Terminal Configuration and Functions
    1. 6.1 Pin Diagram – RGZ Package (Top View)
    2. 6.2 Signal Descriptions – RGZ Package
    3. 6.3 Connections for Unused Pins and Modules
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Power Supply and Modules
    5. 7.5  Power Consumption - Power Modes
    6. 7.6  Power Consumption - Radio Modes
    7. 7.7  Nonvolatile (Flash) Memory Characteristics
    8. 7.8  Thermal Resistance Characteristics
    9. 7.9  RF Frequency Bands
    10. 7.10 Bluetooth Low Energy - Receive (RX)
    11. 7.11 Bluetooth Low Energy - Transmit (TX)
    12. 7.12 Zigbee and Thread - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - RX
    13. 7.13 Zigbee and Thread - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - TX
    14. 7.14 Timing and Switching Characteristics
      1. 7.14.1 Reset Timing
      2. 7.14.2 Wakeup Timing
      3. 7.14.3 Clock Specifications
        1. 7.14.3.1 48 MHz Crystal Oscillator (XOSC_HF)
        2. 7.14.3.2 48 MHz RC Oscillator (RCOSC_HF)
        3. 7.14.3.3 2 MHz RC Oscillator (RCOSC_MF)
        4. 7.14.3.4 32.768 kHz Crystal Oscillator (XOSC_LF)
        5. 7.14.3.5 32 kHz RC Oscillator (RCOSC_LF)
      4. 7.14.4 Synchronous Serial Interface (SSI) Characteristics
        1. 7.14.4.1 Synchronous Serial Interface (SSI) Characteristics
        2.       36
      5. 7.14.5 UART
        1. 7.14.5.1 UART Characteristics
    15. 7.15 Peripheral Characteristics
      1. 7.15.1 ADC
        1. 7.15.1.1 Analog-to-Digital Converter (ADC) Characteristics
      2. 7.15.2 DAC
        1. 7.15.2.1 Digital-to-Analog Converter (DAC) Characteristics
      3. 7.15.3 Temperature and Battery Monitor
        1. 7.15.3.1 Temperature Sensor
        2. 7.15.3.2 Battery Monitor
      4. 7.15.4 Comparators
        1. 7.15.4.1 Low-Power Clocked Comparator
        2. 7.15.4.2 Continuous Time Comparator
      5. 7.15.5 Current Source
        1. 7.15.5.1 Programmable Current Source
      6. 7.15.6 GPIO
        1. 7.15.6.1 GPIO DC Characteristics
    16. 7.16 Typical Characteristics
      1. 7.16.1 MCU Current
      2. 7.16.2 RX Current
      3. 7.16.3 TX Current
      4. 7.16.4 RX Performance
      5. 7.16.5 TX Performance
      6. 7.16.6 ADC Performance
  8. 8 Detailed Description
    1. 8.1  Overview
    2. 8.2  System CPU
    3. 8.3  Radio (RF Core)
      1. 8.3.1 Bluetooth 5.2 Low Energy
      2. 8.3.2 802.15.4 (Thread, Zigbee, 6LoWPAN)
    4. 8.4  Memory
    5. 8.5  Sensor Controller
    6. 8.6  Cryptography
    7. 8.7  Timers
    8. 8.8  Serial Peripherals and I/O
    9. 8.9  Battery and Temperature Monitor
    10. 8.10 µDMA
    11. 8.11 Debug
    12. 8.12 Power Management
    13. 8.13 Clock Systems
    14. 8.14 Network Processor
  9. 9 Application, Implementation, and Layout
    1. 9.1 Reference Designs
    2. 9.2 Junction Temperature Calculation
  10. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 Tools and Software
      1. 10.2.1 SimpleLink™ Microcontroller Platform
    3. 10.3 Documentation Support
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.13 Zigbee and Thread - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - TX

Measured on the CC1352-P7EM-XD7793-XD24-PA24 reference design with Tc = 25 °C, VDDS = 3.0 V, fRF= 2440 MHz with
DC/DC enabled and high power PA connected to VDDS unless otherwise noted.
All measurements are performed at the antenna input with a combined RX and TX path, except for high power PA which is measured at a dedicated antenna connection. All measurements are performed conducted.
 
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
General Parameters
Max output power, high power PA Differential mode, delivered to a single-ended 50-Ω load through a balun 20 dBm
Output power programmable range,
high power PA		 Differential mode, delivered to a single-ended 50-Ω load through a balun 6 dB
Max output power, high power PA, 10 dBm configuration(4) Differential mode, delivered to a single-ended 50-Ω load through a balun 10.5 dBm
Output power programmable range,
high power PA, 10 dBm configuration(4)		 Differential mode, delivered to a single-ended 50-Ω load through a balun 5 dB
Max output power, regular PA Differential mode, delivered to a single-ended 50-Ω load through a balun 5 dBm
Output power programmable range,
regular PA		 Differential mode, delivered to a single-ended 50-Ω load through a balun 26 dB
Spurious emissions and harmonics
Spurious emissions,
high-power PA(2)		 f < 1 GHz, outside restricted bands +20 dBm setting < -39 dBm
f < 1 GHz, restricted bands FCC < -49 dBm
f > 1 GHz, including harmonics -40 dBm
Harmonics,
high-power PA(3)		 Second harmonic -35 dBm
Third harmonic -42 dBm
Spurious emissions,
high-power PA, 10 dBm configuration(2)(4)		 f < 1 GHz, outside restricted bands +10 dBm setting(4) < -36 dBm
f < 1 GHz, restricted bands ETSI < -47 dBm
f < 1 GHz, restricted bands FCC < -55 dBm
f > 1 GHz, including harmonics -42 dBm
Harmonics,
high-power PA, 10 dBm configuration(4)		 Second harmonic < -42 dBm
Third harmonic < -42 dBm
Spurious emissions,
regular PA(1)		 f < 1 GHz, outside restricted bands +5 dBm setting < -36 dBm
f < 1 GHz, restricted bands ETSI < -47 dBm
f < 1 GHz, restricted bands FCC < -55 dBm
f > 1 GHz, including harmonics < –42 dBm
Harmonics,
regular PA		 Second harmonic < -42 dBm
Third harmonic < -42 dBm
IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps)
Error vector magnitude,
high power PA		 +20 dBm setting 2 %
Error vector magnitude,
high power PA, 10 dBm configuration(4)		 +10 dBm setting 2 %
Error vector magnitude
Regular PA		 +5 dBm setting 2 %
(1) To ensure margins for passing FCC band edge requirements at 2483.5 MHz, a lower than maximum output-power setting or less than 100% duty cycle may be used when operating at 2480 MHz.
(2) To ensure margins for passing FCC band edge requirements at 2483.5 MHz, a lower than maximum output-power setting or less than 100% duty cycle may be used when operating at the upper 802.15.4 channel(s). 
(3) To ensure margins for passing FCC requirements for harmonic emission, duty cycling may be required. 
(4) Measured on the CC1352-P7EM-XD7793-XD24-PA24_10dbm reference design.