SWRS253B May   2021  – March 2023 CC2652R7

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1. 3.1 Functional Block Diagram
  4. 4 Revision History
  5. 5 Device Comparison
  6. 6 Terminal Configuration and Functions
    1. 6.1 Pin Diagram – RGZ Package (Top View)
    2. 6.2 Signal Descriptions – RGZ Package
    3. 6.3 Connections for Unused Pins and Modules
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Power Supply and Modules
    5. 7.5  Power Consumption - Power Modes
    6. 7.6  Power Consumption - Radio Modes
    7. 7.7  Nonvolatile (Flash) Memory Characteristics
    8. 7.8  Thermal Resistance Characteristics
    9. 7.9  RF Frequency Bands
    10. 7.10 Bluetooth Low Energy - Receive (RX)
    11. 7.11 Bluetooth Low Energy - Transmit (TX)
    12. 7.12 Zigbee and Thread - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - RX
    13. 7.13 Zigbee and Thread - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - TX
    14. 7.14 Timing and Switching Characteristics
      1. 7.14.1 Reset Timing
      2. 7.14.2 Wakeup Timing
      3. 7.14.3 Clock Specifications
        1. 7.14.3.1 48 MHz Crystal Oscillator (XOSC_HF)
        2. 7.14.3.2 48 MHz RC Oscillator (RCOSC_HF)
        3. 7.14.3.3 2 MHz RC Oscillator (RCOSC_MF)
        4. 7.14.3.4 32.768 kHz Crystal Oscillator (XOSC_LF)
        5. 7.14.3.5 32 kHz RC Oscillator (RCOSC_LF)
      4. 7.14.4 Synchronous Serial Interface (SSI) Characteristics
        1. 7.14.4.1 Synchronous Serial Interface (SSI) Characteristics
        2.       36
      5. 7.14.5 UART
        1. 7.14.5.1 UART Characteristics
    15. 7.15 Peripheral Characteristics
      1. 7.15.1 ADC
        1. 7.15.1.1 Analog-to-Digital Converter (ADC) Characteristics
      2. 7.15.2 DAC
        1. 7.15.2.1 Digital-to-Analog Converter (DAC) Characteristics
      3. 7.15.3 Temperature and Battery Monitor
        1. 7.15.3.1 Temperature Sensor
        2. 7.15.3.2 Battery Monitor
      4. 7.15.4 Comparators
        1. 7.15.4.1 Low-Power Clocked Comparator
        2. 7.15.4.2 Continuous Time Comparator
      5. 7.15.5 Current Source
        1. 7.15.5.1 Programmable Current Source
      6. 7.15.6 GPIO
        1. 7.15.6.1 GPIO DC Characteristics
    16. 7.16 Typical Characteristics
      1. 7.16.1 MCU Current
      2. 7.16.2 RX Current
      3. 7.16.3 TX Current
      4. 7.16.4 RX Performance
      5. 7.16.5 TX Performance
      6. 7.16.6 ADC Performance
  8. 8 Detailed Description
    1. 8.1  Overview
    2. 8.2  System CPU
    3. 8.3  Radio (RF Core)
      1. 8.3.1 Bluetooth 5.2 Low Energy
      2. 8.3.2 802.15.4 (Thread, Zigbee, 6LoWPAN)
    4. 8.4  Memory
    5. 8.5  Sensor Controller
    6. 8.6  Cryptography
    7. 8.7  Timers
    8. 8.8  Serial Peripherals and I/O
    9. 8.9  Battery and Temperature Monitor
    10. 8.10 µDMA
    11. 8.11 Debug
    12. 8.12 Power Management
    13. 8.13 Clock Systems
    14. 8.14 Network Processor
  9. 9 Application, Implementation, and Layout
    1. 9.1 Reference Designs
    2. 9.2 Junction Temperature Calculation
  10. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 Tools and Software
      1. 10.2.1 SimpleLink™ Microcontroller Platform
    3. 10.3 Documentation Support
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.2 Signal Descriptions – RGZ Package

Table 6-1 Signal Descriptions – RGZ Package
PIN I/O TYPE DESCRIPTION
NAME NO.
DCDC_SW 33 — Power Output from internal DC/DC converter. Tie to ground for external regulator model (1.7-V to 1.95-V operation).(1)
DCOUPL 23 — Power For decoupling of internal 1.27-V regulated digital supply (2)
DIO_0 5 I/O Digital GPIO
DIO_1 6 I/O Digital GPIO
DIO_2 7 I/O Digital GPIO
DIO_3 8 I/O Digital GPIO
DIO_4 9 I/O Digital GPIO
DIO_5 10 I/O Digital GPIO, high-drive capability
DIO_6 11 I/O Digital GPIO, high-drive capability
DIO_7 12 I/O Digital GPIO, high-drive capability
DIO_8 14 I/O Digital GPIO
DIO_9 15 I/O Digital GPIO
DIO_10 16 I/O Digital GPIO
DIO_11 17 I/O Digital GPIO
DIO_12 18 I/O Digital GPIO
DIO_13 19 I/O Digital GPIO
DIO_14 20 I/O Digital GPIO
DIO_15 21 I/O Digital GPIO
DIO_16 26 I/O Digital GPIO, JTAG_TDO, high-drive capability
DIO_17 27 I/O Digital GPIO, JTAG_TDI, high-drive capability
DIO_18 28 I/O Digital GPIO
DIO_19 29 I/O Digital GPIO
DIO_20 30 I/O Digital GPIO
DIO_21 31 I/O Digital GPIO
DIO_22 32 I/O Digital GPIO
DIO_23 36 I/O Digital or Analog GPIO, analog capability
DIO_24 37 I/O Digital or Analog GPIO, analog capability
DIO_25 38 I/O Digital or Analog GPIO, analog capability
DIO_26 39 I/O Digital or Analog GPIO, analog capability
DIO_27 40 I/O Digital or Analog GPIO, analog capability
DIO_28 41 I/O Digital or Analog GPIO, analog capability
DIO_29 42 I/O Digital or Analog GPIO, analog capability
DIO_30 43 I/O Digital or Analog GPIO, analog capability
EGP — — GND Ground – exposed ground pad(3)
JTAG_TMSC 24 I/O Digital JTAG TMSC, high-drive capability
JTAG_TCKC 25 I Digital JTAG TCKC
RESET_N 35 I Digital Reset, active low. No internal pullup resistor
RF_P 1 — RF Positive RF input signal to LNA during RX
Positive RF output signal from PA during TX
RF_N 2 — RF Negative RF input signal to LNA during RX
Negative RF output signal from PA during TX
VDDR 45 — Power Internal supply, must be powered from the internal DC/DC converter or the internal LDO. For external regulator mode (1.7-V to 1.95-V operation, connect to external regulator and internal DC-DC cannot be used.(2)(4)(6)
VDDR_RF 48 — Power Internal supply, must be powered from the internal DC/DC converter or the internal LDO. For external regulator mode (1.7-V to 1.95-V operation, connect to external regulator and internal DC-DC cannot be used.(2)(5)(6)
VDDS 44 — Power 1.8-V to 3.8-V main chip supply. For external regulator mode (1.7-V to 1.95-V operation, connect to external regulator and internal DC-DC cannot be used.(1)
VDDS2 13 — Power 1.8-V to 3.8-V DIO supply. For external regulator mode (1.7-V to 1.95-V operation, connect to external regulator and internal DC-DC cannot be used.(1)
VDDS3 22 — Power 1.8-V to 3.8-V DIO supply. For external regulator mode (1.7-V to 1.95-V operation, connect to external regulator and internal DC-DC cannot be used.(1)
VDDS_DCDC 34 — Power 1.8-V to 3.8-V DC/DC converter supply. Tie to ground for external regulator mode (1.7-V to 1.95-V operation).
X48M_N 46 — Analog 48-MHz crystal oscillator pin 1
X48M_P 47 — Analog 48-MHz crystal oscillator pin 2
X32K_Q1 3 — Analog 32-kHz crystal oscillator pin 1
X32K_Q2 4 — Analog 32-kHz crystal oscillator pin 2
(1) For more details, see technical reference manual listed in Section 10.3.
(2) Do not supply external circuitry from this pin.
(3) EGP is the only ground connection for the device. Good electrical connection to device ground on printed circuit board (PCB) is imperative for proper device operation.
(4) If internal DC/DC converter is not used, this pin is supplied internally from the main LDO.
(5) If internal DC/DC converter is not used, this pin must be connected to VDDR for supply from the main LDO.
(6) Output from internal DC/DC and LDO is trimmed to 1.68 V.