SWRS232D February 2019 – February 2021 CC2652RB
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The on-chip debug support is done through a dedicated cJTAG (IEEE 1149.7) or JTAG (IEEE 1149.1) interface. The device boots by default into cJTAG mode and must be reconfigured to use 4-pin JTAG.