SWRS304A October   2024  – December 2024 CC2745P10-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Functional Block Diagram
  6. Device Comparison
  7. Pin Configuration and Functions
    1. 6.1 Pin Diagram—RHA package
    2. 6.2 Signal Descriptions—RHA Package
    3. 6.3 Connections for Unused Pins and Modules—RHA Package
    4. 6.4 RHA Peripheral Pin Mapping
    5. 6.5 RHA Peripheral Signal Descriptions
  8. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD and MSL Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  DC/DC
    5. 7.5  GLDO
    6. 7.6  Power Supply and Modules
    7. 7.7  Battery Monitor
    8. 7.8  BATMON Temperature Sensor
    9. 7.9  Power Consumption—Power Modes
    10. 7.10 Power Consumption—Radio Modes
    11. 7.11 Nonvolatile (Flash) Memory Characteristics
    12. 7.12 Thermal Resistance Characteristics
    13. 7.13 RF Frequency Bands
    14. 7.14 Bluetooth Low Energy—Receive (RX)
    15. 7.15 Bluetooth Low Energy—Transmit (TX)
    16. 7.16 Bluetooth Channel Sounding
    17. 7.17 2.4GHz RX/TX CW
    18. 7.18 Timing and Switching Characteristics
      1. 7.18.1 Reset Timing
      2. 7.18.2 Wakeup Timing
      3. 7.18.3 Clock Specifications
        1. 7.18.3.1 48 MHz Crystal Oscillator (HFXT)
        2. 7.18.3.2 96 MHz RC Oscillator (HFOSC)
        3. 7.18.3.3 80/90/98 MHz RC Oscillator (AFOSC)
        4. 7.18.3.4 32 kHz Crystal Oscillator (LFXT)
        5. 7.18.3.5 32 kHz RC Oscillator (LFOSC)
    19. 7.19 Peripheral Characteristics
      1. 7.19.1 UART
        1. 7.19.1.1 UART Characteristics
      2. 7.19.2 SPI
        1. 7.19.2.1 SPI Characteristics
        2. 7.19.2.2 SPI Controller Mode
        3. 7.19.2.3 SPI Timing Diagrams - Controller Mode
        4. 7.19.2.4 SPI Peripheral Mode
        5. 7.19.2.5 SPI Timing Diagrams - Peripheral Mode
      3. 7.19.3 I2C
        1. 7.19.3.1 I2C Characteristics
        2. 7.19.3.2 I2C Timing Diagram
      4. 7.19.4 I2S
        1. 7.19.4.1 I2S Controller Mode
        2. 7.19.4.2 I2S Peripheral Mode
      5. 7.19.5 CAN-FD
        1. 7.19.5.1 CAN-FD Characteristics
      6. 7.19.6 GPIO
        1. 7.19.6.1 GPIO DC Characteristics
      7. 7.19.7 ADC
        1. 7.19.7.1 Analog-to-Digital Converter (ADC) Characteristics
      8. 7.19.8 Comparators
        1. 7.19.8.1 Low Power Comparator
      9. 7.19.9 Voltage Glitch Monitor
    20. 7.20 Typical Characteristics
      1. 7.20.1 MCU Current
      2. 7.20.2 RX Current
      3. 7.20.3 TX Current
      4. 7.20.4 RX Performance
      5. 7.20.5 TX Performance
      6. 7.20.6 ADC Performance
  9. Detailed Description
    1. 8.1  Overview
    2. 8.2  System CPU
    3. 8.3  Radio (RF Core)
      1. 8.3.1 Bluetooth Low Energy
    4. 8.4  Memory
    5. 8.5  Hardware Security Module (HSM)
    6. 8.6  Cryptography
    7. 8.7  Timers
    8. 8.8  Algorithm Processing Unit (APU)
    9. 8.9  Serial Peripherals and I/O
    10. 8.10 Battery and Temperature Monitor
    11. 8.11 Voltage Glitch Monitor (VGM)
    12. 8.12 µDMA
    13. 8.13 Debug
    14. 8.14 Power Management
    15. 8.15 Clock Systems
    16. 8.16 Network Processor
    17. 8.17 Integrated BALUN, High Power PA (Power Amplifier)
  10. Application, Implementation, and Layout
    1. 9.1 Reference Designs
    2. 9.2 Junction Temperature Calculation
  11. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 Tools and Software
      1. 10.2.1 SimpleLink™ Microcontroller Platform
      2. 10.2.2 Software License and Notice
    3. 10.3 Documentation Support
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Signal Descriptions—RHA Package

Table 6-1 Signal Descriptions—RHA Package
PIN I/O TYPE DESCRIPTION
NAME NO.
VDDR 1 Power Internal supply, must be powered from the internal DC/DC converter or the GLDO(1)(2)(3)
VDDR 2 Power Internal supply, must be powered from the internal DC/DC converter or the internal LDO(1)(2)(3)
DIO0 3 I/O Digital GPIO
DIO1 4 I/O Digital GPIO
DIO2 5 I/O Digital GPIO, high-drive capability
DIO3 6 I/O Digital GPIO, high-drive capability
DIO4 7 I/O Digital GPIO
DIO5 8 I/O Digital GPIO
VDDIO 9 Power 1.71V to 3.8V split rail I/O supply(4)
DIO7 10 I/O Digital GPIO
DIO9_SWDIO 11 I/O Digital GPIO, SWD interface: mode select or SWDIO, high-drive capability
DIO10_SWDCK 12 I/O Digital GPIO, SWD interface: serial wire clock, high-drive capability
DIO11 13 I/O Digital GPIO
DIO12 14 I/O Digital GPIO
DIO15 15 I/O Digital GPIO
DIO16 16 I/O Digital GPIO
VDDIO 17 Power 1.71V to 3.8V split rail I/O supply(4)
VDDS 18 Power 1.71V to 3.8V supply(4)
DIO17_A8 19 I/O Digital or Analog GPIO, analog capability, high-drive capability
DIO18_A7 20 I/O Digital or Analog GPIO, analog capability, high-drive capability
DIO19_A6 21 I/O Digital or Analog GPIO, analog capability
DIO20_A5 22 I/O Digital or Analog GPIO, analog capability
DIO21_A4 23 I/O Digital or Analog GPIO, analog capability
DIO22_A3 24 I/O Digital or Analog GPIO, analog capability
RSTN 25 I Digital Reset, active low. No internal pullup resistor
DIO23_X32P 26 I/O Digital or Analog GPIO, 32kHz crystal oscillator pin 1, optional TCXO input
DIO24_X32N 27 I/O Digital or Analog GPIO, 32kHz crystal oscillator pin 2
VDDD 28 Power Internal 1.32V regulated core-supply. Connect an external 1μF decoupling capacitor.(1)
VDDS 29 Power 1.71V to 3.8V supply. Connect an external 10μF decoupling capacitor.(4)
DCDC 30 Power Switching node of internal DC/DC converter(4)
VDDS 31 Power 1.71V to 3.8V supply(4)
DIO27_A1 32 I/O Digital or Analog GPIO, analog capability
DIO28_A0 33 I/O Digital or Analog GPIO, analog capability
VDDR 34 Power Internal supply, must be powered from the internal DC/DC converter or the internal LDO. Connect an external 10μF decoupling capacitor.(1)(2)(3)
X48P 35 Analog 48MHz crystal oscillator pin 1
X48N 36 Analog 48MHz crystal oscillator pin 2
NC 37 No Connect
VDDS 38 Power 1.71V to 3.8V supply(4)
ANT 39 RF 2.4GHz TX, RX
NC 40

No Connect (6)

EGP

GND Ground – exposed ground pad(5)
Do not supply external circuitry from this pin.
VDDR pins 1, 2, and 34 must be tied together on the PCB.
Output from internal DC/DC and LDO is trimmed to 1.5V.
For more details, see the technical reference manual listed in Documentation Support.
EGP is the only ground connection for the device. A good electrical connection to the device ground on the printed circuit board (PCB) is imperative for proper device operation.
This pin is not connected to the die. In the LP-EM-CC2745R10-Q1 reference design, this pin is connected to ground to give better shielding on the antenna path.