SWRS304A October 2024 – December 2024 CC2745P10-Q1 , CC2745R10-Q1
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
ADC Power Supply and Input Range Conditions | ||||||
V(Ax) | Analog input voltage range | All ADC analog input pins Ax | 0 | VDDS | V | |
I(ADC) single-ended mode | Operating supply current into VDDS terminal |
RES = 0x0 (12Bit mode), Fs = 1.2MSPS, Internal reference OFF (ADC.REFCFG_REFEN = 0), VeREF+ = VDDS | 480 | μA | ||
RES = 0x0 (12Bit mode), Fs = 266ksps, Internal reference ON (ADC.REFCFG_REFEN = 1), REFVSEL = 2.5V | 365 | |||||
CI GPIO | Input capacitance into a single terminal | 5 | 7 | pF | ||
RI GPIO | Input MUX ON-resistance | 0.5 | 1 | kΩ | ||
ADC Switching Characteristics | ||||||
FS ADCREF | ADC sampling frequency when using the internal ADC reference voltage | ADC.REFCFG_REFEN = 1, RES = 0x0 (12Bits), VDDS = 1.71V to VDDSmax | 267 (2) | ksps | ||
FS ADCREF | ADC sampling frequency when using the internal ADC reference voltage | ADC.REFCFG_REFEN = 1, RES = 0x1 (10Bits), VDDS = 1.71V to VDDSmax | 308 (2) | ksps | ||
FS ADCREF | ADC sampling frequency when using the internal ADC reference voltage | ADC.REFCFG_REFEN = 1, RES = 0x2 (8Bits), VDDS = 1.71V to VDDSmax | 400 (2) | ksps | ||
FS EXTREF | ADC sampling frequency when using the external ADC reference voltage | ADC.REFCFG_REFEN = 0, VeREF+ = VDDS, RES = 0x0 (12Bits), VDDS = 1.71V to VDDSmax | 1.2 (2) | Msps | ||
FS EXTREF | ADC sampling frequency when using the external ADC reference voltage | ADC.REFCFG_REFEN = 0, VeREF+ = VDDS, RES = 0x1 (10Bits), VDDS = 1.71V to VDDSmax | 1.33 (2) | Msps | ||
FS EXTREF | ADC sampling frequency when using the external ADC reference voltage | ADC.REFCFG_REFEN = 0, VeREF+ = VDDS, RES = 0x2 (8Bits), VDDS = 1.71V to VDDSmax | 1.6 (2) | Msps | ||
NCONVERT | Clock cycles for conversion | RES = 0x0 (12Bits) | 14 | cycles | ||
NCONVERT | Clock cycles for conversion | RES = 0x1 (10Bits) | 12 | cycles | ||
NCONVERT | Clock cycles for conversion | RES = 0x2 (8Bits) | 9 | cycles | ||
tSample | Sampling time | RES = 0x0 (12-bit), RS = 25 Ω, Cpext = 10 pF. +/- 0.5 LSB settling | 166.6 | ns | ||
tVSUPPLY/3(sample) | Sample time required when Vsupply/3 channel is selected | 20 | µs | |||
ADC Linearity Parameters | ||||||
EI | Integral linearity error (INL) for single-ended inputs | 12-bit Mode, VR+ = VeREF+ = VDDS, VDDS=1.71-->3.8 | +/-2 | LSB | ||
ED | Differential linearity error (DNL) | 12-bit Mode, VR+ = VeREF+ = VDDS, VDDS=1.71-->3.8 | +/-1 | LSB | ||
EO | Offset error | External reference, VR+ = VeREF+ = VDDS, VDDS=1.71-->3.8 | -3 | 3 | mV | |
EO | Offset error | Internal reference, VR+ = REFVSEL= 2.5V | -3 | 3 | mV | |
EG | Gain error | External Reference, VR+ = VeREF+ = VDDS , VDD= 1.71-->3.8 | +/- 2 | LSB | ||
EG | Gain error | Internal reference, VR+ = REFVSEL= 2.5V | +/- 40 | LSB | ||
ADC Dynamic Parameters | ||||||
ENOB | Effective number of bits | ADC.REFCFG_REFEN = 0, VeREF+ = VDDS =3.3V, VeREF-=0V, RES = 0x2 (8-bit) | 8 | bit | ||
ENOB | Effective number of bits | ADC.REFCFG_REFEN = 0, VeREF+ = VDDS =3.3V, VeREF-=0V, RES = 0x1 (10-bit) | 9.9 | bit | ||
ENOB | Effective number of bits | ADC.REFCFG_REFEN = 0, VeREF+ = VDDS =3.3V, VeREF-=0V, RES = 0x0 (12-bit) | 11.2 | bit | ||
ENOB | Effective number of bits | ADC.REFCFG_REFEN = 1, REFVSEL = {2.5V, 1.4V}, RES = 0x2 (8-bit) | 8 | bit | ||
ENOB | Effective number of bits | ADC.REFCFG_REFEN = 1, REFVSEL = {2.5V, 1.4V} , RES = 0x1 (10-bit) | 9.6 |
bit | ||
ENOB | Effective number of bits | ADC.REFCFG_REFEN = 1, REFVSEL = {2.5V, 1.4V}, RES = 0x0 (12-bit) | 10.4 |
bit | ||
ENOB | Effective number of bits | VDDS reference, RES = 0x0 (12-bit) | 11.2 | bit | ||
SINAD | Signal-to-noise and distortion ratio | ADC.REFCFG_REFEN = 0, VeREF+ = VDDS =3.3V, VeREF-=0V, RES = 0x0 (12-bit) | 69.18 |
dB | ||
SINAD | Signal-to-noise and distortion ratio | ADC.REFCFG_REFEN = 1, REFVSEL = {2.5V, 1.4V}, RES = 0x0 (12-bit) | 64.37 | dB | ||
SINAD | Signal-to-noise and distortion ratio | VDDS reference, RES = 0x0 (12-bit) | 69.18 |
dB | ||
ADC External Reference | ||||||
EXTREF | Positive external reference voltage input | ADC.REFCFG_REFEN=0, ADC reference sourced from external reference pin (VeREF+) | 1.4 | VDDS | V | |
EXTREF | Negative external reference voltage input | ADC.REFCFG_REFEN=0, ADC reference sourced from external reference pin (VeREF-) | 0 | V | ||
ADC Supply Monitor | ||||||
ADC Internal Input: VSUPPLY / 3 Accuracy | Vsupply voltage divider accuracy for supply monitoring | ADC input channel: Vsupply monitor | -1.5 | 1.5 | % | |
ADC Internal Input: IVsupply / 3 | Vsupply voltage divider current consumption | ADC input channel Vsupply monitor. Vsupply=VDDS=3.3V | 10 | uA | ||
ADC Internal and VDDS Reference | ||||||
VDDSREF | Positive ADC reference voltage | ADC reference sourced from VDDS | VDDS | V | ||
ADCREF | Internal ADC Reference Voltage | ADC.REFCFG_REFEN = 1, REFVSEL = 0, VDDS = 1.71V - VDDSmax | 1.4 | V | ||
ADCREF_EN = 1, REFVSEL = 1, VDDS = 2.7V - VDDSmax | 2.5 | V | ||||
IADCREF | Operating supply current into VDDA terminal with internal reference ON | ADC.REFCFG_REFEN = 1, VDDA = 1.7V to VDDAmax, REFVSEL = {0,1} | 80 | µA | ||
tON | Internal ADC Reference Voltage power on-time | ADC.REFCFG_REFEN = 1 | 2 | µs |