SWRS225E February   2019  – December 2024 CC3135MOD

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagrams
  6. 5 Device Comparison
    1. 5.1 Related Products
  7. 6 Pin Configuration and Functions
    1. 6.1 CC3135MOD Pin Diagram
    2. 6.2 Pin Attributes
    3. 6.3 Signal Descriptions
      1.      12
    4. 6.4 Connections for Unused Pins
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Current Consumption Summary: 2.4GHz RF Band
    5. 7.5  Current Consumption Summary: 5GHz RF Band
    6. 7.6  TX Power Control for 2.4 GHz Band
    7. 7.7  TX Power Control for 5GHz Band
    8. 7.8  Brownout and Blackout Conditions
    9. 7.9  Electrical Characteristics for DIO Pins
    10. 7.10 WLAN Receiver Characteristics
      1.      25
      2.      26
    11. 7.11 WLAN Transmitter Characteristics
      1.      28
      2.      29
    12. 7.12 BLE and WLAN Coexistence Requirements
    13. 7.13 Reset Requirement
    14. 7.14 Thermal Resistance Characteristics for MOB Package
    15. 7.15 Timing and Switching Characteristics
      1. 7.15.1 Power-Up Sequencing
      2. 7.15.2 Power-Down Sequencing
      3. 7.15.3 Device Reset
      4. 7.15.4 Wakeup From HIBERNATE Mode Timing
    16. 7.16 External Interfaces
      1. 7.16.1 SPI Host Interface
      2. 7.16.2 Host UART Interface
        1. 7.16.2.1 5-Wire UART Topology
        2. 7.16.2.2 4-Wire UART Topology
        3. 7.16.2.3 3-Wire UART Topology
      3. 7.16.3 External Flash Interface
  9. 8 Detailed Description
    1. 8.1  Overview
    2. 8.2  Module Features
      1. 8.2.1 WLAN
      2. 8.2.2 Network Stack
        1. 8.2.2.1 Security
      3. 8.2.3 FIPS 140-2 Level 1 Certification
      4. 8.2.4 Host Interface and Driver
      5. 8.2.5 System
    3. 8.3  Power-Management Subsystem
      1. 8.3.1 VBAT Wide-Voltage Connection
    4. 8.4  Low-Power Operating Modes
      1. 8.4.1 Low-Power Deep Sleep
      2. 8.4.2 Hibernate
      3. 8.4.3 Shutdown
    5. 8.5  Restoring Factory Default Configuration
    6. 8.6  Hostless Mode
    7. 8.7  Device Certification and Qualification
      1. 8.7.1 FCC Certification and Statement
      2. 8.7.2 IC/ISED Certification Statement
      3. 8.7.3 ETSI/CE Certification
      4. 8.7.4 Japan MIC Certification
    8. 8.8  Module Markings
    9. 8.9  End Product Labeling
    10. 8.10 Manual Information to the End User
  10. 9 Applications, Implementation, and Layout
    1. 9.1 Application Information
      1. 9.1.1 BLE/2.4 GHz Radio Coexistence
      2. 9.1.2 Antenna Selection
      3. 9.1.3 Typical Application
      4. 9.1.4 Power Supply Decoupling and Bulk Capacitors
      5. 9.1.5 Reset
      6. 9.1.6 Unused Pins
    2. 9.2 PCB Layout Guidelines
      1. 9.2.1 General Layout Recommendations
      2. 9.2.2 RF Layout Recommendations
      3. 9.2.3 Antenna Placement and Routing
      4. 9.2.4 Transmission Line Considerations
  11. 10Environmental Requirements and SMT Specifications
    1. 10.1 Temperature
      1. 10.1.1 PCB Bending
    2. 10.2 Handling Environment
      1. 10.2.1 Terminals
      2. 10.2.2 Falling
    3. 10.3 Storage Condition
      1. 10.3.1 Moisture Barrier Bag Before Opened
      2. 10.3.2 Moisture Barrier Bag Open
    4. 10.4 PCB Assembly Guide
      1. 10.4.1 PCB Land Pattern & Thermal Vias
      2. 10.4.2 SMT Assembly Recommendations
      3. 10.4.3 PCB Surface Finish Requirements
      4. 10.4.4 Solder Stencil
      5. 10.4.5 Package Placement
      6. 10.4.6 Solder Joint Inspection
      7. 10.4.7 Rework and Replacement
      8. 10.4.8 Solder Joint Voiding
    5. 10.5 Baking Conditions
    6. 10.6 Soldering and Reflow Condition
  12. 11Device and Documentation Support
    1. 11.1 Device Nomenclature
    2. 11.2 Development Tools and Software
    3. 11.3 Firmware Updates
    4. 11.4 Documentation Support
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Export Control Notice
    8. 11.8 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Mechanical, Land, and Solder Paste Drawings
    2. 13.2 Package Option Addendum
      1. 13.2.1 Packaging Information
      2. 13.2.2 Tape and Reel Information
        1. 13.2.2.1 Tape Specifications

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)

6.2 Pin Attributes

Table 6-1 describes the CC3135MOD pins.

Note:

Digital IOs on the CC3135MOD refer to hostless mode, BLE/2.4 GHz coexistence, and antenna select IOs, not general-purpose IOs.

If an external device drives a positive voltage to signal pads when the CC3135MOD is not powered, DC current is drawn from the other device. If the drive strength of the external device is adequate, an unintentional wakeup and boot of the CC3135MOD device can occur. To prevent current draw, TI recommends one of the following:

  • All devices interfaced to the CC3135MOD must be powered from the same power rail as the CC3135MOD device.
  • Use level shifters between the CC3135MOD and any external devices fed from other independent rails.
  • The nRESET pin of the CC3135MOD device must be held low until the VBAT supply to the device is driven and stable.
Table 6-1 Pin Description and Attributes
PINDEFAULT FUNCTIONDIGITAL I/OSTATE AT RESET AND HIBERNATEI/O TYPE (1)CC3135 DEVICE PIN NO.DESCRIPTION
HOSTLESS MODEBLE COEX
CC_COEX_ OUTCC_COEX_ IN
1GNDN/AN/AN/A—Power-GND
2GNDN/AN/AN/A—Power-GND
3DIO10YYY—I/O1Digital input or output
4nHIB

—

—

—Hi-ZI2Hibernate signal input to the NWP subsystem (active low). This is connected to the MCU GPIO. If the GPIO from the MCU can float while the MCU enters low power, consider adding a pullup resistor on the board to avoid floating.
5HOST_SPI_CLK———Hi-ZI5Host interface SPI clock
6HOST_SPI_MOSI———Hi-ZI6Host interface SPI data input
7HOST_SPI_MISO———Hi-ZO7Host interface SPI data output
8HOST_SPI_nCS———Hi-ZI8Host interface SPI chip select (active low)
9DIO12YYY—O3Digital input or output
10DIO13YYY——4Digital input or output
11HOST_INTR———Hi-ZO15Interrupt output (active high)
12DIO23YYYHi-Z16Digital input or output
13FLASH _SPI_MISON/AN/AN/AHi-ZO-External Serial Flash Programming: SPI data out
14FLASH _SPI_CSN/AN/AN/AHi-ZI-External Serial Flash Programming: SPI chip select (active low)
15FLASH_SPI_CLKN/AN/AN/AHi-ZI-External Serial Flash Programming: SPI clock
16GNDN/AN/AN/A–Power-Ground
17FLASH_SPI_MOSIN/AN/AN/AHi-ZI-External Serial Flash Programming: SPI data in
18DIO24YYYHi-Z17Digital input or output
19DIO28YYY——18Digital input or output
20NCN/AN/AN/A——-No Connect
21Reserved———Hi-Z—-No Connect
22DIO29YYYHi-Z20Digital input or output
23SOP2Y (2)Y—Hi-ZO21A 100 kΩ pull down resistor is internally tied to this SOP pin.
24SOP1N/AN/AN/AHi-Z—34A 100 kΩ pull down resistor is internally tied to this SOP pin. SOP[2:0] used for factory restore. See Section 8.5.
25GNDN/AN/AN/A—Power-GND
26GNDN/AN/AN/A—Power-GND
27GNDN/AN/AN/A—Power-GND
28GNDN/AN/AN/A—Power-GND
29GNDN/AN/AN/A—Power-GND
30GNDN/AN/AN/A—Power-GND
31RF_ABGN/AN/AN/AHi-ZRF27, 28, 312.4 GHz & 5 GHz RF TX, RX
32GNDN/AN/AN/A—Power-GND
33NCN/AN/AN/A——-No Connect
34SOP0N/AN/AN/AHi-Z—35A 100 kΩ pull down resistor is internally tied to this SOP pin. SOP[2:0] used for factory restore. See Section 8.5.
35nRESETN/AN/AN/AHi-ZI32There is an internal 100 kΩ pull-up resistor option from the nRESET pin to VBAT_RESET. Note: VBAT_RESET is not connected to VBAT1 or VBAT2 within the module. The following connection schemes are recommended:
  • Connect nRESET to a GPIO from the host only if nRESET will be in a defined state under all operating conditions. Leave VBAT_RESET unconnected to save power.
  • If nRESET cannot be in a defined state under all operating conditions, connect VBAT_RESET to the main module power supply (VBAT1 and VBAT2). Due to the internal pull-up resistor, a leakage current of 3.3 V / 100 kΩ is expected.
36VBAT_RESETN/AN/AN/AHi-Z—37
37VBAT1N/AN/AN/AHi-Z—39Power supply for the module, must be connected to battery (2.3 V to 3.6 V)
38GNDN/AN/AN/A—Power-GND
39NCN/AN/AN/A——-No Connect
40VBAT2N/AN/AN/AHi-Z-10, 44, 54Power supply for the module, must be connected to battery (2.3 V to 3.6 V)
41NCN/AN/AN/A––-No Connect
42DIO30YYYHi-Z–53Network Scripter I/O
43GNDN/AN/AN/A—Power-GND
44UART1_nRTS———Hi-ZO50UART interface to host (request to send)
45NCN/AN/AN/A——-No Connect
46UART1_TX———Hi-ZO55UART interface to host (transmit)
47UART1_RX———Hi-ZI57UART interface to host (receive)
48TEST_58YYYHi-ZO58Test signal; connect to an external test point.
49TEST_59YYYHi-ZI59Test signal; connect to an external test point.
50TEST_60YYYHi-ZO60Test signal; connect to an external test point.
51UART1_nCTS———Hi-ZI61UART interface to host (clear to send)
52TEST_62———Hi-ZO62Test signal; connect to an external test point.
53DIO8YYYHi-Z63Digital input or output
54DIO9YYYHi-Z—64Digital input or output
(1) I = input, O = output, RF = radio frequency, I/O = bidirectional
(2) Output Only