SWRS243B February 2020 – May 2021 CC3235MODAS , CC3235MODASF , CC3235MODS , CC3235MODSF
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
Figure 8-9 shows the timing diagram for the SPI slave.
Table 8-16 lists the timing parameters for the SPI slave.
ITEM | NAME | DESCRIPTION | MIN | MAX | UNIT |
---|---|---|---|---|---|
F(1) | Clock frequency @ VBAT = 3.3 V | 20 | MHz | ||
Clock frequency @ VBAT ≤ 2.3 V | 12 | ||||
T2 | Tclk(1) | Clock period | 50 | ns | |
D(1) | Duty cycle | 45% | 55% | ||
T6 | tIS(1) | RX data setup time | 4 | ns | |
T7 | tIH(1) | RX data hold time | 4 | ns | |
T8 | tOD(1) | TX data output delay | 20 | ns | |
T9 | tOH(1) | TX data hold time | 24 | ns |