SWRS294D March 2023 – December 2023 CC3300 , CC3301
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
PARAMETER | DESCRIPTION | MIN | MAX | UNIT |
---|---|---|---|---|
fclock | Clock frequency, CLK | 26 | MHz | |
tHigh | High Period | 10 | ns | |
tLow | Low Period | 10 | ||
tTLH | Rise time, CLK | 3 | ||
tTHL | Fall time, CLK | 3 | ||
tCSsu | CS Setup time, CS valid before CLK ↑ | 3 | ||
tISU | PICO, input valid before CLK ↑ | 3 | ||
tIH | PICO Hold time, input valid after CLK ↑ | 3 | ||
tDr, tDf - Active | Delay time, CLK ↑/↓ to output valid | 2 | 10 | |
tDr, tDf - Sleep | Delay time, CLK ↑/↓ to output valid | 12 | ||
CL | Capacitive load on outputs | 15 | 40 | pF |