SLAS554I May 2009 – September 2018 CC430F5133 , CC430F5135 , CC430F5137 , CC430F6125 , CC430F6126 , CC430F6127 , CC430F6135 , CC430F6137
PRODUCTION DATA.
The following documents describe the CC430F613x, CC430F612x, and CC430F513x devices. Copies of these documents are available on the Internet at www.ti.com.
Receiving Nofication of Document Updates
To receive notification of documentation updates—including silicon errata—go to the product folder for your device on ti.com (for links to the product folder, see Section 8.5). In the upper right corner, click the "Alert me" button. This registers you to receive a weekly digest of product information that has changed (if any). For change details, check the revision history of any revised document.
Errata
Describes the known exceptions to the functional specifications.
Describes the known exceptions to the functional specifications.
Describes the known exceptions to the functional specifications.
Describes the known exceptions to the functional specifications.
Describes the known exceptions to the functional specifications.
Describes the known exceptions to the functional specifications.
Describes the known exceptions to the functional specifications.
Describes the known exceptions to the functional specifications.
User's Guides
Detailed information on the modules and peripherals available in this device family.
This user's guide describes how to use the TI Code Composer Studio IDE with the MSP430 ultra-low-power microcontrollers.
The MSP430 bootloader (BSL, formerly known as the bootstrap loader) allows users to communicate with embedded memory in the MSP430 microcontroller during the prototyping phase, final production, and in service. Both the programmable memory (flash memory) and the data memory (RAM) can be modified as required. Do not confuse the bootloader with the bootstrap loader programs found in some digital signal processors (DSPs) that automatically load program code (and data) from external memory to the internal memory of the DSP.
This document describes the functions that are required to erase, program, and verify the memory module of the MSP430 flash-based and FRAM-based microcontroller families using the JTAG communication port. In addition, it describes how to program the JTAG access security fuse that is available on all MSP430 devices. This document describes device access using both the standard 4-wire JTAG interface and the 2-wire JTAG interface, which is also referred to as Spy-Bi-Wire (SBW).
This manual describes the hardware of the TI MSP-FET430 Flash Emulation Tool (FET). The FET is the program development tool for the MSP430 ultra-low-power microcontroller. Both available interface types, the parallel port interface and the USB interface, are described.
Application Reports
Selection of the right crystal, correct load circuit, and proper board layout are important for a stable crystal oscillator. This application report summarizes crystal oscillator function and explains the parameters to select the correct crystal for MSP430 ultra-low-power operation. In addition, hints and examples for correct board layout are given. The document also contains detailed information on the possible oscillator tests to ensure stable oscillator operation in mass production.
System-Level ESD has become increasingly demanding with silicon technology scaling towards lower voltages and the need for designing cost-effective and ultra-low-power components. This application report addresses three different ESD topics to help board designers and OEMs understand and design robust system-level designs: (1) Component-level ESD testing and system-level ESD testing, their differences and why component-level ESD rating does not ensure system-level robustness. (2) General design guidelines for system-level ESD protection at different levels including enclosures, cables, PCB layout, and on-board ESD protection devices. (3) Introduction to System Efficient ESD Design (SEED), a co-design methodology of on-board and on-chip ESD protection to achieve system-level ESD robustness, with example simulations and test results. A few real-world system-level ESD protection design examples and their results are also discussed.
This design note provides plots of CC11xx (CC1100, CC1100E, CC1101, CC1110, and CC1111) sensitivity versus frequency offset for different data rates. The required crystal accuracy is calculated from these plots. The results are also applicable for CC430.
The CC1101 is a truly low cost, highly integrated, and very flexible RF transceiver. The CC1101 is primarily designed for use in low-power applications in the 315, 433, 868 and 915 MHz SRD/ISM bands. This application note describes how to use the CC1101 in the European 863 – 870 MHz SRD frequency bands in order to comply with EN 300 220 requirements. The application note is also applicable for CC1110, CC1111, and CC430 SoCs as they use the same radio as CC1101.
This document describes how the CC1100E and CC1101 can be used in close-range applications. The chips have a saturation limit of approximately −15 dBm at 250 kbps, which might be a challenge for some short-range applications. Two suggested solutions are presented, the first is a double-transmit scheme and the second is to shift the receivers dynamic range during close-range reception.
The CC1101 RF output power level is set by the PATABLE register setting. This register setting also influences the power levels at the different harmonics and the current consumption for the device. These parameters must therefore be considered when choosing the optimal register settings. This document gives complete CC1101 PA tables with typical output power, harmonics, and current consumption for the different register settings at 25°C and 3.0 V supply voltage.
This design note gives a short introduction to RF matching and important aspects when designing products using the CC11xx parts. Because all of the CC11xx parts have the same RF front end, the same matching network can be used between the radio and the antenna. TI provides a reference design for all CC11xx products. These reference designs show recommended placement and values for decoupling capacitors and components in the matching network.