SCHS023E November   1998  – September 2016 CD4013B

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: Static
    6. 6.6 Electrical Characteristics: Dynamic
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • J|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

D, J, N, NS, PW Package
14-Pin SOIC, CDIP, PDIP, SO, TSSOP
Top View

Pin Functions

PIN I/O DESCRIPTION
NO. NAME
1 Q1 O Channel 1 output
2 Q1 O Inverted channel 1 output
3 CLOCK1 I Channel 1 clock input
4 RESET1 I Channel 1 reset
5 D1 I Channel 1 data input
6 SET1 I Channel 1 set
7 VSS — Ground
8 SET2 I Channel 2 set
9 D2 I Channel 2 data input
10 RESET2 I Channel 2 reset
11 CLOCK2 I Channel 2 clock input
12 Q2 O Inverted channel 2 output
13 Q2 O Channel 2 output
14 VDD — Power supply