• Buffered inputs
• Asynchronous reset
• Typical f_MAX = 60MHz at V_CC = 5V, C_L = 15pF,
  T_A = 25°C
• Fanout (overtemperature range)
  • Standard Outputs: 10 LSTTL loads
  • Bus driver outputs: 15 LSTTL loads
• Wide operating temp range: – 55°C to 125°C
• Balanced propagation delay and transition times
• Significant power reduction compared to LSTTL logic ICs
• HC types
  • 2V to 6V operation
  • High noise immunity: N_IL = 30%, N_IH = 30% of V_CC at V_CC = 5V
• HCT types
  • 4.5V to 5.5V operation
  • Direct LSTTL input logic compatibility, V_IL = 0.8V (Max), V_IH = 2V (Min)
  • CMOS input compatibility, I_I ≤ 1μA at V_OL, V_OH

The ’HC164 and ’HCT164 are 8-bit, serial-in, parallel-out, shift registers with asynchronous reset. Data is shifted on the positive edge of Clock (CLK). A LOW on the RESET (CLR) pin resets the shift register and all outputs go to the LOW state regardless of the input conditions. Two Serial Data inputs (A and B) are provided, either one can be used as a data enable control.