SCHS155E November   1998  – May 2024 CD54HC164 , CD54HCT164 , CD74HC164 , CD74HCT164

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Description
  4. 3 Pin Configuration and Functions
  5. 4 Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 Recommended Operating Conditions
    3. 4.3 Thermal Information
    4. 4.4 Electrical Characteristics
    5. 4.5 Prerequisite for Switching Characteristics
    6. 4.6 Switching Characteristics
  6. 5 Parameter Measurement Information
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Device Functional Modes
  8. 7 Power Supply Recommendations
  9. 8 Layout
    1. 8.1 Layout Guidelines
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • J|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4.5 Prerequisite for Switching Characteristics

PARAMETER VCC (V) 25°C – 40°C to 85°C – 55°C to 125°C UNIT
MIN MAX MIN MAX MIN MAX
HC TYPES
fMAX Maximum clock frequency 2 6 5 4 MHz
4.5 30 24 20 MHz
6 35 28 24 MHz
tW CLR pulse width 2 60 75 90 ns
4.5 12 15 18 ns
6 10 13 15 ns
tw CLK pulse width 2 80 100 120 ns
4.5 16 20 24 ns
6 14 17 20 ns
tSU Set-up time 2 60 75 90 ns
4.5 12 15 18 ns
6 10 13 15 ns
tH Hold time 2 4 4 4 ns
4.5 4 4 4 ns
6 4 4 4 ns
tREM CLR to clock,
Removal time		 2 80 100 120 ns
4.5 16 20 24 ns
6 14 17 20 ns
HCT TYPES
fMAX Maximum clock frequency 4.5 27 22 18 MHz
tW CLR pulse width 6 18 23 27 ns
tW CLK pulse width 4.5 18 23 27 ns
tSU Set-up time 6 12 15 18 ns
tH Hold time 4.5 4 4 4 ns
tREM CLR to clock,
Removal time		 6 16 20 24 ns